JP2000277916A - Substrate and split substrate - Google Patents

Substrate and split substrate

Info

Publication number
JP2000277916A
JP2000277916A JP8644599A JP8644599A JP2000277916A JP 2000277916 A JP2000277916 A JP 2000277916A JP 8644599 A JP8644599 A JP 8644599A JP 8644599 A JP8644599 A JP 8644599A JP 2000277916 A JP2000277916 A JP 2000277916A
Authority
JP
Japan
Prior art keywords
substrate
conductive member
insulating
divided
thickness direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8644599A
Other languages
Japanese (ja)
Inventor
Norimitsu Fukamizu
則光 深水
Yuzuru Matsumoto
譲 松本
Akira Imoto
晃 井本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP8644599A priority Critical patent/JP2000277916A/en
Publication of JP2000277916A publication Critical patent/JP2000277916A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To suppress release of a conductive member from an insulating base body by forming a conductive member to a specified depth from the surface of the insulating base in a thickness direction, and forming a split groove deeper than the conductive member in the thickness direction of the insulating base body. SOLUTION: An insulating base 10 is provided with insulating layers 10a-10h, with internal wirings 11 formed between the insulating layers 10b and 10c as well as insulating layers 10f and 10g. The internal wirings 11 are connected with a via hole conductor 12 penetrating the thickness of insulating layers 10g and 10h. The insulating base 10 is provided with a conductive member 13 so formed with a specified depth from the bottom surface of the insulating base 10 in thickness direction, with a split groove 15 so formed as to split the conductive member 13 into two. The split groove 15 is formed on the upper surface of the insulating base 10 as well so as to face the split groove 15 on the lower surface, with the split groove 15 formed on the lower surface being formed deeper than the conductive member 13 in the thickness direction of the insulting base 10.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、分割溝を有する基
板、および端面電極を有する分割基板に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate having a division groove and a division substrate having an end face electrode.

【0002】[0002]

【従来技術】近年、電子機器は小型軽量化、携帯化が進
んでおり、それに用いられる回路ブロックもその動向に
呼応する形で、小型軽量薄型化、表面実装化、複合化が
押し進められている。
2. Description of the Related Art In recent years, electronic devices have become smaller, lighter and more portable, and the circuit blocks used therein have been reduced in size, weight, and thickness, surface-mounted, and composited in accordance with the trend. .

【0003】このような動向の中で、セラミック回路基
板は、その優れた放熱性や低誘電損失等の特徴から従来
より多用されており、高周波モジュールとしてその応用
が進められている。
[0003] In such a trend, ceramic circuit boards have been widely used from the past due to their excellent heat dissipation and low dielectric loss, and their application as a high-frequency module has been promoted.

【0004】従来、表面実装用回路基板は母基板に半田
接合されて用いられている。そして、その接合状態の確
認と信頼性維持の観点から、表面実装用回路基板は端面
電極を有する構造が採用されている。その端面電極を有
する表面実装用回路基板の構造を製造方法の観点からみ
ると、大別して3種類の製造方法がある。
Conventionally, a circuit board for surface mounting is used by being soldered to a mother board. Then, from the viewpoint of checking the bonding state and maintaining reliability, the surface mounting circuit board has a structure having end electrodes. From the viewpoint of the manufacturing method, the structure of the surface mounting circuit board having the end electrodes is roughly classified into three types of manufacturing methods.

【0005】第1の構造はスルーホール厚膜構造と呼ば
れるもので、既に端面電極用のスルーホールが形成され
た未焼成もしくは既焼成の基板に吸引等の技術を併用
し、厚膜印刷技術等により導電性ペーストをスルーホー
ル内壁面にコーティングして焼き付け、スルーホール部
分を横切る分割溝で分割して得られる構造である。本構
造の利点は基板を多数個取りで処理できるため、即ち、
単位ブロック毎に分割した際にはそれぞれが複数の端面
電極を有する分割基板となり、工数削減に有利である。
The first structure is called a through-hole thick film structure, and a technique such as suction is applied to an unfired or fired substrate on which a through-hole for an end face electrode has already been formed, by using a technique such as suction. The structure is obtained by coating a conductive paste on the inner wall surface of the through-hole and baking it, and dividing by a dividing groove crossing the through-hole portion. The advantage of this structure is that the substrate can be processed in large numbers,
When divided into unit blocks, each becomes a divided substrate having a plurality of end face electrodes, which is advantageous in reducing man-hours.

【0006】第2の構造は第1の構造を応用したもので
あり、未焼成のグリーンシート1層毎にスルーホールを
形成し、該スルーホールの内壁面に導電性ペーストをコ
ーティングし、該スルーホール厚膜構造をとったものを
積層一体化することにより達成される構造であり、焼成
後に、スルーホール部分を横切る分割溝で分割して得ら
れる構造である。本構造の利点は内部配線と端面電極の
接合がとり易い点にある。
The second structure is an application of the first structure, in which a through hole is formed for each unfired green sheet layer, and an inner wall surface of the through hole is coated with a conductive paste. This is a structure achieved by laminating and integrating those having a hole thick film structure, and is a structure obtained by baking and dividing by a dividing groove crossing a through hole portion. The advantage of this structure is that the internal wiring and the end face electrode can be easily joined.

【0007】第3の構造は単独形成構造と呼ばれるもの
で、単位ブロックに分割された分割基板に、基本的に1
端面ずつ厚膜印刷技術等を用いて端面電極をパターンニ
ング、焼き付けする方法で得られる構造である。本方法
の利点は実装投影面積でみたときにスルーホールによる
デッドスペースがなく、小型化に適した点である。
[0007] The third structure is called a single formation structure. Basically, a divided substrate divided into unit blocks has a structure of one.
This is a structure obtained by a method of patterning and printing the end face electrodes using a thick film printing technique or the like for each end face. The advantage of this method is that there is no dead space due to a through hole when viewed in a mounting projection area, and the method is suitable for miniaturization.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、上記3
種の製造方法による構造は各々以下のような欠点があっ
た。即ち、第1のスルーホール厚膜構造では、セラミッ
ク基板が内部配線を有していた場合に、内部配線と端面
電極の接続信頼性に欠ける。例えば、未焼成のセラミッ
ク基板が対象であるならば、それにパンチング工法等に
よりスルーホールを形成する必要があるが、形成時に内
部配線が崩れて端面電極との接点がとれにくい。
However, the above 3)
Each of the structures according to the various manufacturing methods has the following disadvantages. That is, the first through-hole thick film structure lacks connection reliability between the internal wiring and the end face electrode when the ceramic substrate has the internal wiring. For example, if the target is an unfired ceramic substrate, it is necessary to form a through-hole in the substrate by a punching method or the like, but the internal wiring collapses at the time of formation, making it difficult to make contact with the end face electrode.

【0009】第2の構造も第1の構造と同様に端面電極
の幅が広くなると不適切になる。即ち、この構造では、
スルーホール内壁面のみにコーティングすることが困難
であり、一方、グリーンシートに形成されたスルーホー
ルに導電性ペーストを充填した場合には、導電性ペース
トをスルーホール内壁面のみに残すには導電性ペースト
の除去作業が必要となり、また、導電性ペーストをその
まま残した場合には導電性ペーストが余分に必要となる
という問題があった。
The second structure becomes unsuitable when the width of the end face electrode is widened, similarly to the first structure. That is, in this structure,
It is difficult to coat only the inner wall surface of the through hole, but if the conductive paste is filled in the through hole formed in the green sheet, the conductive paste is required to be left only on the inner wall surface of the through hole. There has been a problem that the operation of removing the paste is required, and if the conductive paste is left as it is, an additional conductive paste is required.

【0010】さらに、一層毎にパンチング等によりスル
ーホールを形成した後、積層する構造となるが、積層時
の積層精度が低いことにより、スルーホール内壁面が凹
凸となり、端面電極表面も凹凸になりやすいという問題
があった。
[0010] Furthermore, the through hole is formed for each layer by punching or the like, and then laminated. However, due to the low lamination accuracy during lamination, the inner wall surface of the through hole becomes irregular, and the surface of the end face electrode also becomes irregular. There was a problem that it was easy.

【0011】また、第1および第2の構造では、基板表
面に形成された分割溝が、分割した際には端面電極とな
る円筒状の導電部材を通過していたため、分割溝で分割
すると導電部材を直接切断することになり、導電部材に
分割する際の力が作用し、導電部材が剥がれ落ちる等、
導電部材と絶縁基体の接続信頼性が低下するという問題
があった。
In the first and second structures, since the dividing groove formed on the substrate surface passes through the cylindrical conductive member serving as an end surface electrode when divided, the dividing groove forms a conductive material when divided by the dividing groove. The member will be cut directly, the force at the time of splitting into conductive members will act, and the conductive members will peel off,
There is a problem that the connection reliability between the conductive member and the insulating base is reduced.

【0012】また、スルーホールの形成が不可欠であ
り、スルーホールそのものがデッドスペースとなって、
基板の有効面積が小さくなり、実装効率が低いという問
題があった。
Further, the formation of a through hole is indispensable, and the through hole itself becomes a dead space,
There is a problem that the effective area of the substrate is reduced and the mounting efficiency is low.

【0013】さらに、従来から種々の端面構造や導体形
状が用いられてきたが、金型を用いるパンチング工法に
より端面電極を作製した場合、円及び楕円等の単純形状
による設計を強いられ、導電部材と絶縁基体の接続信頼
性や量産性に優れた端面構造が得られなった。
Furthermore, various end face structures and conductor shapes have conventionally been used. However, when end face electrodes are manufactured by a punching method using a mold, design using a simple shape such as a circle and an ellipse is forced, and a conductive member is required. An end face structure excellent in connection reliability and mass productivity of the insulating substrate was not obtained.

【0014】第3の単独形成構造では、端面を露出させ
るために、多数個取りが出来ない。
In the third single formation structure, since the end face is exposed, a large number of pieces cannot be formed.

【0015】従って基板の表面に部品を実装する際、分
割基板毎に実装する必要があり、実装効率を大きく低下
させてしまう。
Therefore, when components are mounted on the surface of the substrate, it is necessary to mount the components on each of the divided substrates, which greatly reduces the mounting efficiency.

【0016】また、これらの構造では、図8に示すよう
に、端面電極41が絶縁基体43の側面全面に形成され
ていたため、電子部品等に衝突した時に剥離し易いとい
う問題があった。また、絶縁基体43の側面全面に形成
されていたため、その端面電極41用の導電ペーストが
多量に必要となり、さらに、図8に示したように、ハン
ダ44により母基板45に接合する際には、ハンダ44
が絶縁基体43の側面全面に形成された端面電極41の
全面にのることになり、ハンダ44の使用量が多量に必
要となるという問題があった。
Further, in these structures, as shown in FIG. 8, since the end face electrode 41 is formed on the entire side face of the insulating base 43, there is a problem that the end face electrode 41 is easily peeled off when colliding with an electronic component or the like. Further, since it is formed on the entire side surface of the insulating base 43, a large amount of conductive paste for the end surface electrode 41 is required. Further, as shown in FIG. , Solder 44
Over the entire surface of the end face electrode 41 formed on the entire side surface of the insulating base 43, and there is a problem that a large amount of solder 44 is required.

【0017】[0017]

【課題を解決するための手段】本発明の基板は、絶縁層
を複数積層してなる絶縁基体と、該絶縁基体の表面から
厚み方向に所定深さで形成された導電部材と、前記絶縁
基体の厚み方向に前記導電部材よりも深く形成され、か
つ前記導電部材を複数に分割する分割溝とを具備するも
のである。
According to the present invention, there is provided a substrate comprising: an insulating base formed by laminating a plurality of insulating layers; a conductive member formed at a predetermined depth in a thickness direction from a surface of the insulating base; And a dividing groove that is formed deeper than the conductive member in the thickness direction and that divides the conductive member into a plurality.

【0018】ここで、絶縁層を複数積層してなる分割基
板用絶縁基体と、該分割基板用絶縁基体の側面に露出し
て形成された端面電極とを有する分割基板において、前
記端面電極が、前記分割基板用絶縁基体の表面から厚み
方向に所定長さで形成され、かつ前記端面電極の表面と
前記分割基板用絶縁基体の側面が同一平面であることが
望ましい。また、端面電極には、分割基板用絶縁基体の
厚み方向に所定深さで形成されたアンカー導電部材が接
続されていることが望ましい。
Here, in a divided substrate having an insulating substrate for a divided substrate formed by laminating a plurality of insulating layers, and an end surface electrode formed on the side surface of the insulating substrate for a divided substrate, the end surface electrode includes: It is preferable that the surface of the insulating substrate for a divided substrate is formed to have a predetermined length in the thickness direction from the surface of the insulating substrate for a divided substrate, and that the surface of the end face electrode and the side surface of the insulating substrate for the divided substrate are coplanar. Further, it is preferable that an anchor conductive member formed at a predetermined depth in the thickness direction of the insulating substrate for a divided substrate is connected to the end face electrode.

【0019】[0019]

【作用】本発明の基板によれば、分割溝で基板を分割す
るとそれぞれが端面電極を有する分割基板となるが、分
割溝の形成深さが導電部材の深さよりも深いため、基板
内に埋設された導電部材の側面は分割溝内に露出してお
り、分割溝で分割する際にも導電部材を直接分割するこ
とがなく、導電部材に応力が作用せず、絶縁基体からの
導電部材の剥がれが抑制され、この導電部材と絶縁基体
との接続信頼性を向上することができる。
According to the substrate of the present invention, when the substrate is divided by the dividing groove, each of the divided substrates has an end face electrode. However, since the forming depth of the dividing groove is deeper than the depth of the conductive member, the substrate is embedded in the substrate. The side surface of the conductive member is exposed in the dividing groove, does not directly divide the conductive member even when dividing by the dividing groove, no stress acts on the conductive member, the conductive member from the insulating base Peeling is suppressed, and connection reliability between the conductive member and the insulating base can be improved.

【0020】また、本発明の分割基板は、端面電極を、
分割基板用絶縁基体の表面から厚み方向に所定長さで形
成し、端面電極の表面と分割基板用絶縁基体の側面を同
一平面としたので、即ち、端面電極が分割基板用絶縁基
体の側面に埋設した状態となり、従来のように端面電極
の表面が突出していないため、この端面電極が電子部品
等に衝突したとしても剥がれ落ちることがない。
Further, in the divided substrate according to the present invention, the end face electrode is
Formed at a predetermined length in the thickness direction from the surface of the insulating substrate for a divided substrate, and the surface of the end surface electrode and the side surface of the insulating substrate for the divided substrate are flush with each other. Since it is buried and the surface of the end face electrode does not protrude as in the conventional case, even if this end face electrode collides with an electronic component or the like, it does not peel off.

【0021】また、従来は、分割基板の側面の全面に端
面電極が形成されていたため、さらに、母基板にハンダ
により接合する場合でも、端面電極全面にハンダがのる
ことになり、端面電極を形成するためのペースト、およ
び母基板に接合するためのハンダ等が多量に必要であっ
たが、本発明では、端面電極の露出面積を必要最小限の
面積とすることができ、端面電極、ハンダの材料費が低
減できる。
Conventionally, an end face electrode is formed on the entire side surface of the divided substrate. Therefore, even when the end face electrode is joined to the mother board by solder, the solder is put on the entire end face electrode. Although a large amount of paste and solder for bonding to the mother substrate were required, the present invention makes it possible to reduce the exposed area of the end face electrode to a minimum necessary area. Material cost can be reduced.

【0022】さらに、端面電極に分割基板用絶縁基体の
厚み方向に所定深さで形成されたアンカー導電部材を接
続することにより、端面電極の分割基板からの剥離をさ
らに防止できるとともに、分割基板内に形成された内部
配線をアンカー導電部材に接続することにより、内部配
線と端面電極との接続を確実に行うことができる。
Further, by connecting an anchor conductive member formed at a predetermined depth in the thickness direction of the insulating substrate for a divided substrate to the end surface electrode, the separation of the end surface electrode from the divided substrate can be further prevented, and the inside of the divided substrate can be prevented. By connecting the internal wiring formed in the above to the anchor conductive member, the connection between the internal wiring and the end face electrode can be reliably performed.

【0023】さらにまた、端面電極の表面を半田ぬれ性
の良好な金属でめっき処理することにより、端面電極の
露出面積が少なくても母基板へのハンダによる接合を確
実に行うことができる。
Furthermore, by plating the surface of the end face electrode with a metal having good solder wettability, soldering to the mother board can be reliably performed even if the exposed area of the end face electrode is small.

【0024】また、スルーホールを用いて端面電極を形
成した従来の場合に比較して、分割基板上のデッドスペ
ースが無くなるため、部品を搭載可能な面積が拡大し、
部品の実装密度を向上することができる。
Further, as compared with the conventional case where the end face electrodes are formed using through holes, there is no dead space on the divided substrate, so that the area in which components can be mounted is increased,
The mounting density of components can be improved.

【0025】[0025]

【発明の実施の形態】図1は、本発明の分割基板の斜視
図を示すもので、符号1は分割基板用絶縁基体を示して
おり、入出力端子、電源端子、グランド端子等の端子が
端面電極2として示されている。端面電極2は分割基板
用絶縁基体1の側面4面に計10個所露出して形成され
ている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a perspective view of a divided substrate according to the present invention. Reference numeral 1 denotes an insulating substrate for the divided substrate, and terminals such as an input / output terminal, a power supply terminal, and a ground terminal are provided. This is shown as an end face electrode 2. The end face electrodes 2 are formed so as to be exposed at a total of ten places on four side surfaces of the insulating substrate 1 for a divided substrate.

【0026】また、分割基板用絶縁基体1の上面には、
表面電極(配線)3が形成され、この表面電極3には抵
抗器やコンデンサ等のチップ部品4が接続されている。
また、分割基板用絶縁基体1にはキャビティ部5が形成
されており、このキャビティ部5には半導体ベアチップ
6が収容され、ワイヤにより表面電極3と接続されてい
る。
On the upper surface of the insulating substrate 1 for divided substrates,
A surface electrode (wiring) 3 is formed, and a chip component 4 such as a resistor or a capacitor is connected to the surface electrode 3.
A cavity 5 is formed in the insulating substrate 1 for a divided substrate, and a semiconductor bare chip 6 is accommodated in the cavity 5 and is connected to the surface electrode 3 by a wire.

【0027】そして、本発明の分割基板は、図2に示す
ように、端面電極2が、分割基板用絶縁基体1の底面か
ら厚み方向に所定長さLで埋設して形成され、端面電極
2の表面と分割基板用絶縁基体1の側面が同一平面とさ
れている。分割基板用絶縁基体1の厚み方向における端
面電極2の長さLは、分割基板用絶縁基体1の厚みの1
/4以下とされている。
As shown in FIG. 2, in the divided substrate of the present invention, the end face electrode 2 is formed so as to be embedded at a predetermined length L in the thickness direction from the bottom surface of the insulating base 1 for the divided board. And the side surface of the divided substrate insulating substrate 1 are flush with each other. The length L of the end face electrode 2 in the thickness direction of the divided substrate insulating substrate 1 is equal to 1 of the thickness of the divided substrate insulating substrate 1.
/ 4 or less.

【0028】また、端面電極2には、分割基板用絶縁基
体1の厚み方向に所定深さで形成されたアンカー導電部
材7が接続されており、端面電極2とアンカー導電部材
7により、T字状の導電部材が形成されている。分割基
板用絶縁基体1の下面には、端面電極2、アンカー導電
部材7に接続する表面電極3が形成されている。
Further, an anchor conductive member 7 formed at a predetermined depth in the thickness direction of the divided substrate insulating substrate 1 is connected to the end face electrode 2. The end face electrode 2 and the anchor conductive member 7 form a T-shape. An electrically conductive member is formed. An end surface electrode 2 and a surface electrode 3 connected to an anchor conductive member 7 are formed on the lower surface of the divided substrate insulating substrate 1.

【0029】さらに、分割基板は最終的に半田により実
装されるため、分割基板の端面電極2はハンダで接合で
きるものでなくてはならない。ガラスセラミックを含む
セラミックスとの同時焼成を考えると、セラミックスは
800〜1000℃程度で焼成可能な材料であり、ま
た、端子電極の構成金属は、銀、パラジウム、白金、
銅、および銀とパラジウムの合金のうちの一種を主成分
とするものであり、このうちでも銀系合金もしくは銅が
好ましい。銀は半田食われがあるため、ニッケル下地で
スズめっき等を施したほうが好ましい。また、タングス
テンやモリブデン等は半田で接続が直接不可能である為
に、この場合にもタングステンやモリブデン等の表面に
メッキ等を施した方が好ましい。
Further, since the divided substrate is finally mounted by soldering, the end surface electrodes 2 of the divided substrate must be able to be joined by solder. Considering simultaneous firing with ceramics including glass ceramics, ceramics are materials that can be fired at about 800 to 1000 ° C., and the constituent metals of the terminal electrodes are silver, palladium, platinum,
The main component is copper and one of silver and palladium alloys, and among them, a silver alloy or copper is preferable. Since silver is eroded by solder, it is preferable to apply tin plating or the like on a nickel base. Further, since tungsten or molybdenum or the like cannot be directly connected by soldering, it is preferable to apply plating or the like to the surface of tungsten or molybdenum in this case as well.

【0030】このような分割基板は、例えば、図3に示
すように、プラスチック基板からなる母基板8に配置さ
れ、この母基板8の表面電極と、分割基板の端面電極2
がハンダ9により接合されることになる。
As shown in FIG. 3, for example, such a divided substrate is disposed on a mother substrate 8 made of a plastic substrate.
Are joined by the solder 9.

【0031】以上のように構成された分割基板では、端
面電極2を、分割基板用絶縁基体1の底面から厚み方向
に長さLで形成し、端面電極2の表面と分割基板用絶縁
基体1の側面を同一平面としたので、従来のように端面
電極2の表面が突出していないため、この端面電極2に
電子部品等が衝突したとしても剥がれ落ちることがな
い。また、端面電極2の露出面積を必要最小限の面積と
することができ、端面電極2、ハンダ9の材料費が低減
できる。
In the divided substrate configured as described above, the end surface electrode 2 is formed with a length L in the thickness direction from the bottom surface of the insulating substrate 1 for the divided substrate, and the surface of the end surface electrode 2 and the insulating substrate 1 for the divided substrate are formed. Since the side surfaces are flush with each other, the surface of the end face electrode 2 does not protrude as in the prior art, so that even if an electronic component or the like collides with the end face electrode 2, it does not peel off. Further, the exposed area of the end face electrode 2 can be reduced to a necessary minimum area, and the material cost of the end face electrode 2 and the solder 9 can be reduced.

【0032】さらに、端面電極2にアンカー導電部材7
を接続することにより、端面電極2の分割基板用絶縁基
体1からの剥離をさらに防止できるとともに、分割基板
用絶縁基体1内に形成された内部配線をアンカー導電部
材7に接続することにより、内部配線と端面電極2との
接続を確実に行うことができる。
Further, an anchor conductive member 7 is attached to the end face electrode 2.
Can be further prevented from peeling off the end surface electrode 2 from the insulating substrate for a divided substrate 1, and the internal wiring formed in the insulating substrate for a divided substrate 1 is connected to the anchor conductive member 7, whereby the internal The connection between the wiring and the end face electrode 2 can be reliably performed.

【0033】さらにまた、端面電極2の表面を半田ぬれ
性の良好な金属でめっき処理することにより、端面電極
2の露出面積が少なくても母基板8への接合を確実に行
うことができる。さらに、従来のように端面電極2を形
成するためのスルーホールを形成しないため、デッドス
ペースが無く、分割基板への部品の搭載面積を拡大する
ことができる。
Further, by plating the surface of the end face electrode 2 with a metal having good solder wettability, the end face electrode 2 can be reliably bonded to the mother board 8 even if the exposed area of the end face electrode 2 is small. Furthermore, since no through hole for forming the end face electrode 2 is formed unlike the conventional case, there is no dead space, and the mounting area of components on the divided substrate can be increased.

【0034】上記のような分割基板は、この分割基板が
集合した、図4に示すような基板を分割溝に沿って分割
することにより得られる。以下、本発明の基板について
説明する。尚、図4は、表面電極3、チップ部品4等の
記載は省略した。
The divided substrate as described above is obtained by dividing the substrate as shown in FIG. 4 in which the divided substrates are assembled along the dividing groove. Hereinafter, the substrate of the present invention will be described. In FIG. 4, illustration of the surface electrode 3, the chip component 4, and the like is omitted.

【0035】本発明の基板は、図5に示すように、絶縁
層10a〜10h、内部配線11、ビアホール導体1
2、端面電極2となる導電部材13とからなり、絶縁層
10a〜10hにより絶縁基体10が形成され、表面に
は表面電極3が形成されている。
As shown in FIG. 5, the substrate of the present invention comprises insulating layers 10a to 10h, internal wiring 11, via-hole conductor 1
2. An insulating substrate 10 is formed by a conductive member 13 serving as an end face electrode 2. The insulating substrate 10 is formed by the insulating layers 10a to 10h, and a surface electrode 3 is formed on the surface.

【0036】絶縁層10a〜10hは、例えば、ガラス
セラミック材料からなり、それぞれの厚みは40〜15
0μmとされている。このような絶縁層10bと絶縁層
10c、絶縁層10fと絶縁層10g間には内部配線1
1が形成されている。内部配線11は、金系、銀系、銅
系の金属材料、例えば銀系導体からなっている。また、
内部配線11は、絶縁層10g、10hの厚みを貫くビ
アホール導体12によって接続されているものもあれ
ば、容量結合等で分布定数的に接続されるものもある。
このビアホール導体12も内部配線11と同様に金系、
銀系、銅系の金属材料、例えば銀系導体からなってい
る。
The insulating layers 10a to 10h are made of, for example, a glass ceramic material, and each has a thickness of 40 to 15 hours.
0 μm. The internal wiring 1 is provided between the insulating layers 10b and 10c and between the insulating layers 10f and 10g.
1 is formed. The internal wiring 11 is made of a gold-based, silver-based, or copper-based metal material, for example, a silver-based conductor. Also,
The internal wires 11 are connected by via-hole conductors 12 penetrating through the thicknesses of the insulating layers 10g and 10h, and are sometimes connected in a distributed manner by capacitive coupling or the like.
This via-hole conductor 12 is also made of a metal such as
It is made of a silver-based or copper-based metal material, for example, a silver-based conductor.

【0037】絶縁基体10の表面には、ビアホール導体
12と接続する表面電極3が形成されており、この表面
電極3上には、必要に応じて厚膜抵抗体膜や厚膜保護膜
が形成されたり、メッキ処理されたり、また、図1に示
したように、ICを含む各種チップ部品が半田やボンデ
ィング細線によって接合される。
A surface electrode 3 connected to the via-hole conductor 12 is formed on the surface of the insulating substrate 10, and a thick-film resistor film and a thick-film protective film are formed on the surface electrode 3 as necessary. Various types of chip components including ICs are joined by soldering or fine bonding wires, as shown in FIG.

【0038】そして、絶縁基体10には、図4乃至図6
に示すように、絶縁基体10の底面から厚み方向に所定
深さで形成された導電部材13が形成されており、この
導電部材13を2つに分割するように分割溝15が形成
されている。この分割溝15は、下面の分割溝15に対
向するように、絶縁基体10の上面にも形成されてお
り、下面に形成された分割溝15は絶縁基体10の厚み
方向に導電部材13よりも深く形成されている。尚、図
6は、図5の導電部材13近傍の底面斜視図であり、表
面電極3は省略した。
FIGS. 4 to 6 show the insulating substrate 10.
As shown in FIG. 1, a conductive member 13 is formed at a predetermined depth in the thickness direction from the bottom surface of the insulating base 10, and a dividing groove 15 is formed so as to divide the conductive member 13 into two. . The dividing groove 15 is also formed on the upper surface of the insulating base 10 so as to face the dividing groove 15 on the lower surface, and the dividing groove 15 formed on the lower surface is larger than the conductive member 13 in the thickness direction of the insulating base 10. It is deeply formed. FIG. 6 is a bottom perspective view of the vicinity of the conductive member 13 in FIG. 5, and the surface electrode 3 is omitted.

【0039】また、図5及び図6に示すように、分割溝
15に接しない側の導電部材13には、絶縁基体の底面
から厚み方向に所定深さで形成されたアンカー導電部材
7が接続されている。絶縁基体10の下面には、導電部
材13とアンカー導電部材7が十字状に形成され、より
詳細に説明すると、一対のT字状の導電部材が分割溝を
挟んで対向するように形成されているのである。
As shown in FIGS. 5 and 6, an anchor conductive member 7 formed at a predetermined depth in the thickness direction from the bottom surface of the insulating base is connected to the conductive member 13 not in contact with the dividing groove 15. Have been. On the lower surface of the insulating base 10, a conductive member 13 and an anchor conductive member 7 are formed in a cross shape. More specifically, a pair of T-shaped conductive members are formed so as to face each other with a dividing groove interposed therebetween. It is.

【0040】導電部材13およびアンカー導電部材7の
絶縁基体10の厚み方向の長さは、絶縁基体10の厚み
の1/4以下であることが望ましい。これは、積層成形
体に分割溝15を形成する必要があるが、分割溝15
は、導電部材13を絶縁基体10を厚み方向に分割でき
るだけの深さを必要とする。しかし、その深さが絶縁基
板10の厚みに対して深すぎると基板そのものが切断さ
れてしまうため、導電部材13の絶縁基体10の厚み方
向の長さLは、絶縁基体10の表面より絶縁基体10の
厚みの1/4以下とする必要がある。
It is desirable that the length of the conductive member 13 and the anchor conductive member 7 in the thickness direction of the insulating base 10 is not more than 4 of the thickness of the insulating base 10. This requires the formation of the dividing groove 15 in the laminated molded body,
Requires a depth that allows the conductive member 13 to divide the insulating base 10 in the thickness direction. However, if the depth is too deep with respect to the thickness of the insulating substrate 10, the substrate itself is cut. Therefore, the length L of the conductive member 13 in the thickness direction of the insulating base 10 is larger than the surface of the insulating base 10. It is necessary to set the thickness to 10 or less of the thickness of No. 10.

【0041】本発明の基板の製造方法を、図7に基いて
説明する。先ず、絶縁層10a〜10hとなるスリップ
材を作製する。スリップ材は、例えば、ガラスセラミッ
クスまたはセラミック原料粉末、光硬化可能なモノマ
ー、例えばポリオキシエチル化トリメチロールプロパン
トリアクリレートと、有機バインダ、例えばアルキルメ
タクリレートと、可塑剤とを、有機溶剤、例えばエチル
カルビトールアセテートに混合し、ボールミルで混練し
て作製される。
The method of manufacturing a substrate according to the present invention will be described with reference to FIG. First, a slip material to be the insulating layers 10a to 10h is manufactured. The slip material is, for example, glass ceramic or ceramic raw material powder, a photocurable monomer such as polyoxyethylated trimethylolpropane triacrylate, an organic binder such as alkyl methacrylate, and a plasticizer, and an organic solvent such as ethyl carbyl. It is mixed with tall acetate and kneaded with a ball mill.

【0042】セラミック原料粉末としては、例えば、金
属元素として少なくともMg、Ti、Caを含有する複
合酸化物であって、その金属元素酸化物による組成式を
(1−x)MgTiO3 −xCaTiO3 (但し、式中
xは重量比を表し、0.01≦x≦0.15)で表され
る主成分100重量部に対して、硼素含有化合物をB2
3 換算で3〜30重量部、アルカリ金属含有化合物を
アルカリ金属炭酸塩換算で1〜25重量部添加含有して
なるものが用いられる。
[0042] As the ceramic raw material powder, for example, at least Mg, Ti, a composite oxide containing Ca, a composition formula by a metal element oxide (1-x) MgTiO 3 -xCaTiO 3 as the metal element ( Here, x represents a weight ratio, and a boron-containing compound is added to B 2 with respect to 100 parts by weight of a main component represented by 0.01 ≦ x ≦ 0.15).
Those containing 3 to 30 parts by weight in terms of O 3 and 1 to 25 parts by weight of an alkali metal-containing compound in terms of alkali metal carbonate are used.

【0043】尚、上述の実施例では溶剤系スリップ材を
作製しているが、親水性の官能基を付加した光硬化可能
なモノマー、例えば多官能基メタクリレートモノマー、
有機バインダ、例えばカルボキシル変性アルキルメタク
リレートを用いて、イオン交換水で混練した水系スリッ
プ材であっても良い。
Although the solvent-based slip material is manufactured in the above-described embodiment, a photocurable monomer having a hydrophilic functional group added thereto, for example, a polyfunctional methacrylate monomer,
An aqueous slip material kneaded with ion-exchanged water using an organic binder, for example, a carboxyl-modified alkyl methacrylate, may be used.

【0044】セラミック原料粉末としては、例えば、ガ
ラス材料であるSiO2 、Al2 3 、ZnO、Mg
O、B2 3 を主成分とする結晶化ガラス粉末70重量
%とセラミック材料であるアルミナ粉末30重量%とか
らなるものも用いられる。セラミック原料粉末は、特に
限定されるものではない。
Examples of the ceramic raw material powder include glass materials such as SiO 2 , Al 2 O 3 , ZnO, and Mg.
A powder composed of 70% by weight of crystallized glass powder containing O and B 2 O 3 as main components and 30% by weight of alumina powder as a ceramic material is also used. The ceramic raw material powder is not particularly limited.

【0045】また、ビアホール導体12、内部配線11
および表面電極3、導電部材13、アンカー導電部材7
となる導電性ペーストを作製する。導電性ペーストは、
低融点で且つ低抵抗の金属材料である例えば銀粉末と、
硼珪酸系低融点ガラス、例えばB2 3 −SiO2 −B
aOガラス、CaO−B2 3 −SiO2 ガラス、Ca
O−Al2 3 −B2 3 −SiO2 ガラスと、有機バ
インダ、例えばエチルセルロースとを、有機溶剤、例え
ば2,2,4−トリメチル−1,3−ペンタジオールモ
ノイソブチレートに混合し、3本ローラーにより均質混
練して作製される。
The via-hole conductor 12 and the internal wiring 11
And surface electrode 3, conductive member 13, anchor conductive member 7
A conductive paste is prepared. The conductive paste is
For example, silver powder which is a low melting point and low resistance metal material,
Borosilicate low melting glass, for example, B 2 O 3 -SiO 2 -B
aO glass, CaO-B 2 O 3 -SiO 2 glass, Ca
And O-Al 2 O 3 -B 2 O 3 -SiO 2 glass, an organic binder, such as ethyl cellulose, organic solvents, and mixed, for example, 2,2,4-trimethyl-1,3-pentanediol mono-isobutyrate It is manufactured by homogenous kneading with three rollers.

【0046】本発明のセラミック回路基板の製造方法
は、まず、図7(a)に示すように、支持基板25上
に、上述のスリップ材をドクターブレード法によって塗
布・乾燥して、絶縁層10aを形成する絶縁層成形体3
1aを形成する。ここで、支持基板25としては、マイ
ラーフイルムを用い、焼成工程前に取り外される。
In the method of manufacturing a ceramic circuit board according to the present invention, first, as shown in FIG. 7A, the above-mentioned slip material is applied and dried on a support substrate 25 by a doctor blade method to form an insulating layer 10a. Formed insulating layer 3 for forming
1a is formed. Here, a mylar film is used as the support substrate 25 and is removed before the firing step.

【0047】次に、絶縁層成形体31aに、図7(b)
に示すように、十字状のアンカー・端面電極用貫通溝3
5a(以下、単に貫通溝35aということもある)の形
成を行う。貫通溝35aの形成は、露光処理、現像処
理、洗浄・乾燥処理により行う。露光処理は、絶縁層成
形体31a上に、貫通溝35aが形成される領域が遮光
されるようなフォトターゲットを載置して、例えば、超
高圧水銀灯(10mW/cm2 )を光源として用いて露
光を行なう。
Next, the insulating layer molded body 31a is formed as shown in FIG.
As shown in FIG.
5a (hereinafter, sometimes simply referred to as a through groove 35a) is formed. The formation of the through groove 35a is performed by an exposure process, a development process, and a cleaning / drying process. In the exposure treatment, a photo target is placed on the insulating layer molded body 31a so that the area where the through groove 35a is formed is shielded from light, and for example, an ultra-high pressure mercury lamp (10 mW / cm 2 ) is used as a light source. Perform exposure.

【0048】これにより、貫通溝35aが形成される領
域の絶縁層成形体31aにおいては、光硬化可能なモノ
マの光重合反応がおこらず、貫通 H M35aが形成
される領域以外の絶縁層成形体31aにおいては、光重
合反応が起こる。ここで光重合反応が起こった部位を不
溶化部といい、光重合反応が起こらない部位を溶化部と
いう。
As a result, in the insulating layer molded body 31a in the region where the through groove 35a is formed, the photopolymerization reaction of the photocurable monomer does not occur, and the insulating layer molded body other than the region where the through hole HM35a is formed. At 31a, a photopolymerization reaction occurs. Here, the part where the photopolymerization reaction has occurred is called an insolubilized part, and the part where the photopolymerization reaction does not occur is called a solubilized part.

【0049】現像処理は、絶縁層成形体31aの溶化部
を現像液で除去するもので、具体的には、例えば、トリ
エタノールアミン水溶液を現像液として用いてスプレー
現像を行う。この現像処理により、図7(b)に示すよ
うに、絶縁層成形体31aに十字状の貫通溝35aを形
成することができる。その後、絶縁層成形体31aを現
像により生じる不要なカスなどを洗浄、乾燥工程により
完全に除去する。
In the developing treatment, the solubilized portion of the insulating layer molded body 31a is removed with a developing solution. Specifically, for example, spray development is performed using a triethanolamine aqueous solution as a developing solution. By this development processing, a cross-shaped through groove 35a can be formed in the insulating layer molded body 31a as shown in FIG. 7B. After that, unnecessary debris and the like generated by developing the insulating layer molded body 31a are completely removed by a washing and drying process.

【0050】次に、貫通溝35aへ導電性ペーストを充
填し、乾燥して、導電部材13、アンカー導電部材7の
一部となる導体部材36aを形成する。具体的には、図
7(c)に示すように、上述の工程で形成した貫通溝3
5a内に上述の導電性ペーストを充填し、乾燥する。貫
通溝35aに相当する部位のみに印刷可能なスクリーン
を用いて印刷によって導体部材36aを形成し、その
後、80℃で10分乾燥する。
Next, a conductive paste is filled into the through groove 35a and dried to form a conductive member 13a and a conductive member 36a which becomes a part of the anchor conductive member 7. Specifically, as shown in FIG. 7C, the through-grooves 3 formed in the above-described steps are formed.
5a is filled with the above-mentioned conductive paste and dried. The conductor member 36a is formed by printing using a screen that can be printed only on the portion corresponding to the through groove 35a, and then dried at 80 ° C. for 10 minutes.

【0051】上記のような工程を繰り返して、絶縁層成
形体31a〜31gが形成された積層体を作製する。こ
の後、スリップ材をドクターブレード法によって塗布・
乾燥して、絶縁基体10の最表面の絶縁層成形体31h
を形成する。
By repeating the above-described steps, a laminated body on which the insulating layer molded bodies 31a to 31g are formed is manufactured. After that, apply the slip material by the doctor blade method.
After drying, the insulating layer formed body 31h on the outermost surface of the insulating substrate 10
To form

【0052】この絶縁層成形体31hに上記した露光処
理を施し、導電性ペーストを塗布して表面電極を形成す
る。
The above-mentioned exposure treatment is applied to the insulating layer molded body 31h, and a conductive paste is applied to form a surface electrode.

【0053】このようにして作製された積層成形体を、
必要に応じて、プレスで形状を整え、図7(d)に示す
ような積層成形体が得られ、この後、支持基板25が除
去され、積層成形体底面に表面電極を形成する。
The laminated molded body thus produced is
If necessary, the shape is adjusted by pressing to obtain a laminated molded product as shown in FIG. 7D, and thereafter, the support substrate 25 is removed, and a surface electrode is formed on the bottom surface of the laminated molded product.

【0054】そして、積層成形体の両面から、回路ブロ
ックに分割される位置に鋭利な刃を押し付けて、図5に
示すような分割溝を形成する。導電部材13の中央部を
分割溝15が通過するようにする。この時、その深さ
は、導電部材13を完全に分割する深さとする。これに
よりT字状の導電部材が対向した状態となる。
Then, a sharp blade is pressed from both sides of the laminated molded body to a position where it is divided into circuit blocks to form a dividing groove as shown in FIG. The dividing groove 15 passes through the center of the conductive member 13. At this time, the depth is a depth at which the conductive member 13 is completely divided. As a result, the T-shaped conductive members face each other.

【0055】この後、脱バインダー工程と、本焼成工程
からなる焼成を行ない、脱バインダー工程において、含
まれている有機バインダ、光硬化可能なモノマを消失
し、本焼成工程により焼結する。
Thereafter, firing is performed in a debinding step and a main firing step. In the debinding step, the organic binder and the photocurable monomer contained in the binder are eliminated, and sintering is performed in the main firing step.

【0056】その後、表面処理として、さらに、厚膜抵
抗体膜や絶縁膜の印刷・焼きつけを行ない、メッキ処
理、さらにICチップを含む電子部品の接合を行うこと
により、本発明の基板が作製される。
Thereafter, as a surface treatment, printing and baking of a thick-film resistor film and an insulating film are further performed, plating is performed, and electronic components including an IC chip are joined, whereby a substrate of the present invention is manufactured. You.

【0057】[0057]

【発明の効果】本発明の基板によれば、分割溝の深さが
導電部材の深さよりも深いため、基板内に埋設された導
電部材の側面は分割溝内に露出しており、分割溝で分割
する際にも導電部材を直接分割することがなく、導電部
材に応力が作用せず、絶縁基体からの導電部材の剥がれ
が抑制され、この導電部材と絶縁基体との接続信頼性を
向上することができる。
According to the substrate of the present invention, since the depth of the dividing groove is greater than the depth of the conductive member, the side surface of the conductive member embedded in the substrate is exposed in the dividing groove. Even when the conductive member is divided by the above, the conductive member is not directly divided, the stress is not applied to the conductive member, the peeling of the conductive member from the insulating base is suppressed, and the connection reliability between the conductive member and the insulating base is improved. can do.

【0058】また、本発明の分割基板は、端面電極の表
面と分割基板用絶縁基体の側面を同一平面としたので、
端面電極が分割基板用絶縁基体に埋設した状態となり、
従来のように端面電極の表面が突出していないため、こ
の端面電極が電子部品等に衝突したとしても剥がれ落ち
ることがない。また、端面電極の露出面積を必要最小限
の面積とすることができ、端面電極、ハンダの材料費を
低減できる。
Further, in the divided substrate of the present invention, the surface of the end face electrode and the side surface of the insulating substrate for the divided substrate are flush with each other.
The end surface electrode is buried in the insulating substrate for the divided substrate,
Since the surface of the end face electrode does not protrude as in the related art, even if the end face electrode collides with an electronic component or the like, it does not peel off. Further, the exposed area of the end face electrode can be made the minimum necessary area, and the material cost of the end face electrode and solder can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の分割基板を示す斜視図である。FIG. 1 is a perspective view showing a divided substrate according to the present invention.

【図2】図1の分割基板の端面電極近傍を示すもので、
(a)は断面図、(b)は底面図である。
FIG. 2 shows the vicinity of an end face electrode of the divided substrate of FIG. 1,
(A) is a sectional view, and (b) is a bottom view.

【図3】分割基板を母基板に実装した状態を示す説明図
である。
FIG. 3 is an explanatory view showing a state in which a divided board is mounted on a mother board.

【図4】基板を示す斜視図である。FIG. 4 is a perspective view showing a substrate.

【図5】図4の一部の断面図である。FIG. 5 is a partial cross-sectional view of FIG. 4;

【図6】図5の導電部材およびその近傍を示す底面斜視
図である。
FIG. 6 is a bottom perspective view showing the conductive member of FIG. 5 and its vicinity.

【図7】基板の製造方法を示す工程図である。FIG. 7 is a process chart showing a method for manufacturing a substrate.

【図8】従来の分割基板を母基板に実装した状態を示す
説明図である。
FIG. 8 is an explanatory view showing a state where a conventional divided board is mounted on a mother board.

【符号の説明】[Explanation of symbols]

1・・・分割基板用絶縁基体 2・・・端面電極 7・・・アンカー導電部材 10・・・絶縁基体 10a〜10h・・・絶縁層 13・・・導電部材 15・・・分割溝 DESCRIPTION OF SYMBOLS 1 ... Insulating base for division | segmentation board 2 ... End surface electrode 7 ... Anchor conductive member 10 ... Insulating base 10a-10h ... Insulating layer 13 ... Conductive member 15 ... Division groove

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】絶縁層を複数積層してなる絶縁基体と、該
絶縁基体の表面から厚み方向に所定深さで形成された導
電部材と、前記絶縁基体の厚み方向に前記導電部材より
も深く形成され、かつ前記導電部材を複数に分割する分
割溝とを具備することを特徴とする基板。
An insulating base formed by laminating a plurality of insulating layers; a conductive member formed at a predetermined depth in a thickness direction from a surface of the insulating base; and a conductive member formed deeper than the conductive member in a thickness direction of the insulating base. And a dividing groove formed to divide the conductive member into a plurality of parts.
【請求項2】絶縁層を複数積層してなる分割基板用絶縁
基体と、該分割基板用絶縁基体の側面に露出して形成さ
れた端面電極とを有する分割基板において、前記端面電
極が、前記分割基板用絶縁基体の表面から厚み方向に所
定長さで形成され、かつ前記端面電極の表面と前記分割
基板用絶縁基体の側面が同一平面であることを特徴とす
る分割基板。
2. A divided substrate comprising: an insulating substrate for a divided substrate formed by laminating a plurality of insulating layers; and an end surface electrode formed on a side surface of the insulating substrate for a divided substrate. A divided substrate formed at a predetermined length in a thickness direction from a surface of the divided substrate insulating substrate, and wherein a surface of the end face electrode and a side surface of the divided substrate insulating substrate are flush with each other.
【請求項3】端面電極には、分割基板用絶縁基体の厚み
方向に所定深さで形成されたアンカー導電部材が接続さ
れていることを特徴とする請求項2記載の分割基板。
3. The divided substrate according to claim 2, wherein an anchor conductive member formed at a predetermined depth in a thickness direction of the insulating substrate for the divided substrate is connected to the end face electrode.
JP8644599A 1999-03-29 1999-03-29 Substrate and split substrate Pending JP2000277916A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8644599A JP2000277916A (en) 1999-03-29 1999-03-29 Substrate and split substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8644599A JP2000277916A (en) 1999-03-29 1999-03-29 Substrate and split substrate

Publications (1)

Publication Number Publication Date
JP2000277916A true JP2000277916A (en) 2000-10-06

Family

ID=13887131

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8644599A Pending JP2000277916A (en) 1999-03-29 1999-03-29 Substrate and split substrate

Country Status (1)

Country Link
JP (1) JP2000277916A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005093846A (en) * 2003-09-19 2005-04-07 Murata Mfg Co Ltd Method for manufacturing multilayer ceramic substrate and multilayer ceramic substrate
JP2006165108A (en) * 2004-12-03 2006-06-22 Asahi Glass Co Ltd Ceramic circuit board
JP2006278760A (en) * 2005-03-29 2006-10-12 Tdk Corp Method and apparatus for manufacturing glass ceramic aggregate substrate
JP2008130618A (en) * 2006-11-16 2008-06-05 Murata Mfg Co Ltd Multilayer wiring board
CN100463584C (en) * 2004-11-05 2009-02-18 财团法人工业技术研究院 Pore column dividing type intercommunicating pore structure and its manufacturing method
US8450615B2 (en) 2007-08-29 2013-05-28 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate
US8455769B2 (en) 2008-01-30 2013-06-04 Murata Manufacturing Co., Ltd. Electronic component and method of mounting the same
CN104219880A (en) * 2014-09-26 2014-12-17 杭州华三通信技术有限公司 PCB plate and processing method thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005093846A (en) * 2003-09-19 2005-04-07 Murata Mfg Co Ltd Method for manufacturing multilayer ceramic substrate and multilayer ceramic substrate
JP4696443B2 (en) * 2003-09-19 2011-06-08 株式会社村田製作所 Manufacturing method of multilayer ceramic substrate
CN100463584C (en) * 2004-11-05 2009-02-18 财团法人工业技术研究院 Pore column dividing type intercommunicating pore structure and its manufacturing method
JP2006165108A (en) * 2004-12-03 2006-06-22 Asahi Glass Co Ltd Ceramic circuit board
JP2006278760A (en) * 2005-03-29 2006-10-12 Tdk Corp Method and apparatus for manufacturing glass ceramic aggregate substrate
JP2008130618A (en) * 2006-11-16 2008-06-05 Murata Mfg Co Ltd Multilayer wiring board
US8450615B2 (en) 2007-08-29 2013-05-28 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate
US8455769B2 (en) 2008-01-30 2013-06-04 Murata Manufacturing Co., Ltd. Electronic component and method of mounting the same
CN104219880A (en) * 2014-09-26 2014-12-17 杭州华三通信技术有限公司 PCB plate and processing method thereof

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