JPS6437860A - Manufacture of bi-cmos semiconductor device - Google Patents

Manufacture of bi-cmos semiconductor device

Info

Publication number
JPS6437860A
JPS6437860A JP19397787A JP19397787A JPS6437860A JP S6437860 A JPS6437860 A JP S6437860A JP 19397787 A JP19397787 A JP 19397787A JP 19397787 A JP19397787 A JP 19397787A JP S6437860 A JPS6437860 A JP S6437860A
Authority
JP
Japan
Prior art keywords
grown
region
substrate
regions
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19397787A
Other languages
Japanese (ja)
Inventor
Katsuyuki Inayoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP19397787A priority Critical patent/JPS6437860A/en
Publication of JPS6437860A publication Critical patent/JPS6437860A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To shorten a manufacturing process by forming a bipolar transistor in emitter-base-self alignment structure and shaping an n channel MOSFET in LDD structure. CONSTITUTION:n<+> buried diffusion layers 32 are formed to a p-Si substrate 31, an n-Si layer 33 is grown in an epitaxial manner, and a substrate 21 in a p-well 53 for a MOSFETn, a collector region 43 in a bipolar transistor B and a substrate 63 in a MOSFETp are shaped. A polycrystalline Si film 34 and an Si dioxide film 37a are grown onto field insulating films 36, and p<+> base leading-out regions 44b and gate G electrodes 55, 65 and p<+> intrinsic B regions 44 and p<+> source S-drain D regions 64 are shaped simultaneously in succession. Insulating films among electrode sections are formed at the same time by shaping sidewalls, polycrystalline Si films 35 are grown, and an n<+>E region 45, an n<+>B contact region 43a and n<+> high-concentration S.D region 54 are shaped simultaneously. An inter-layer insulating film 37 is grown, and each electrode 48a-48c, 58, 68 for E, B, C, S and D is formed, thus acquiring a desired Bi-CMOS device.
JP19397787A 1987-08-03 1987-08-03 Manufacture of bi-cmos semiconductor device Pending JPS6437860A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19397787A JPS6437860A (en) 1987-08-03 1987-08-03 Manufacture of bi-cmos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19397787A JPS6437860A (en) 1987-08-03 1987-08-03 Manufacture of bi-cmos semiconductor device

Publications (1)

Publication Number Publication Date
JPS6437860A true JPS6437860A (en) 1989-02-08

Family

ID=16316923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19397787A Pending JPS6437860A (en) 1987-08-03 1987-08-03 Manufacture of bi-cmos semiconductor device

Country Status (1)

Country Link
JP (1) JPS6437860A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH025463A (en) * 1988-06-24 1990-01-10 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPH0330431A (en) * 1989-06-28 1991-02-08 Fujitsu Ltd Bipolar semiconductor device and manufacture thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57136358A (en) * 1981-02-17 1982-08-23 Seiko Instr & Electronics Ltd Integrated circuit device and manufacture thereof
JPS58216455A (en) * 1982-06-09 1983-12-16 Toshiba Corp Manufacture of semiconductor device
JPS5955052A (en) * 1982-09-24 1984-03-29 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPS60235465A (en) * 1984-05-08 1985-11-22 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62106665A (en) * 1985-10-31 1987-05-18 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Manufacture of integrated circuit device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57136358A (en) * 1981-02-17 1982-08-23 Seiko Instr & Electronics Ltd Integrated circuit device and manufacture thereof
JPS58216455A (en) * 1982-06-09 1983-12-16 Toshiba Corp Manufacture of semiconductor device
JPS5955052A (en) * 1982-09-24 1984-03-29 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPS60235465A (en) * 1984-05-08 1985-11-22 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62106665A (en) * 1985-10-31 1987-05-18 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Manufacture of integrated circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH025463A (en) * 1988-06-24 1990-01-10 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPH0330431A (en) * 1989-06-28 1991-02-08 Fujitsu Ltd Bipolar semiconductor device and manufacture thereof

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