JPS6427257A - Cmos type standard cell - Google Patents
Cmos type standard cellInfo
- Publication number
- JPS6427257A JPS6427257A JP62183905A JP18390587A JPS6427257A JP S6427257 A JPS6427257 A JP S6427257A JP 62183905 A JP62183905 A JP 62183905A JP 18390587 A JP18390587 A JP 18390587A JP S6427257 A JPS6427257 A JP S6427257A
- Authority
- JP
- Japan
- Prior art keywords
- regions
- wirings
- wiring
- external
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To remove wasteful regions, and to reduce the area of a chip for an integrated circuit by forming an external wiring region between wirings in P-type and N-type transistor regions in a first metallic wiring layer and changing the space of the P-type and N-type transistor regions in response to the number of external wirings passing in the external wiring region. CONSTITUTION:A wiring 42 between transistor regions is shaped by wirings 41b, 41d in the transistor region formed to a first metallic wiring layer 4 and a wiring 51 between transistor regions shaped to a second metallic wiring layer 5, and the wiring between the transistor regions is not formed to the first metallic wiring layer 4. External wiring regions 6, 6a for shaping at least one of an external wiring 61 passing in the cross direction among wirings 41a, 41b in the P-type transistor region and wirings 41c, 41d in the N-type transistor region in the first metallic wiring layer 4 are formed, and a space between the P-type transistor region 1 and the N-type transistor region 2 is changed in response to the number of the formation of the external wirings 61. Accordingly, wasteful regions are decreased, and the area of a chip for an integrated circuit can be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62183905A JPS6427257A (en) | 1987-07-22 | 1987-07-22 | Cmos type standard cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62183905A JPS6427257A (en) | 1987-07-22 | 1987-07-22 | Cmos type standard cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6427257A true JPS6427257A (en) | 1989-01-30 |
Family
ID=16143866
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62183905A Pending JPS6427257A (en) | 1987-07-22 | 1987-07-22 | Cmos type standard cell |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6427257A (en) |
-
1987
- 1987-07-22 JP JP62183905A patent/JPS6427257A/en active Pending
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