JPS5661151A - Package semiconductor integrated circuit - Google Patents

Package semiconductor integrated circuit

Info

Publication number
JPS5661151A
JPS5661151A JP13714879A JP13714879A JPS5661151A JP S5661151 A JPS5661151 A JP S5661151A JP 13714879 A JP13714879 A JP 13714879A JP 13714879 A JP13714879 A JP 13714879A JP S5661151 A JPS5661151 A JP S5661151A
Authority
JP
Japan
Prior art keywords
package
lead wires
holes
another
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13714879A
Other languages
Japanese (ja)
Inventor
Ryuichi Matsuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13714879A priority Critical patent/JPS5661151A/en
Publication of JPS5661151A publication Critical patent/JPS5661151A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1029—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being a lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make it easier to enlarge memory capacity by a method wherein the plural number of lead wires are provided in such a way that they are protruded from one side of a package for use as a memory IC while holes for inserting lead wires are made in the package from the other side of it in the positions opposite to the lead wires so that one package can be put on another. CONSTITUTION:The plural number of lead wires 2 are planted in such a way that they are protruded from one side of a package 1 to be mounted on a chassis as a memory IC, and a chip selecting metal input portion 10 is formed on one part of the side face of the package 1. Next, holes 9 for inserting lead wires are made in the package 1 from the other side in the positions opposite to the lead wires 2 to make it possible to insert the lead wires of another package. By so doing, it becomes the only thing to do when increasing memory capacity to place the package 1 on another mounted on the chassis using the combination of the holes 9 and lead wires 2. Thus, terminals with the same functions can be connected together without using wiring.
JP13714879A 1979-10-23 1979-10-23 Package semiconductor integrated circuit Pending JPS5661151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13714879A JPS5661151A (en) 1979-10-23 1979-10-23 Package semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13714879A JPS5661151A (en) 1979-10-23 1979-10-23 Package semiconductor integrated circuit

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63049081A Division JPH01144664A (en) 1988-03-01 1988-03-01 Integrated circuit device for semiconductor memory

Publications (1)

Publication Number Publication Date
JPS5661151A true JPS5661151A (en) 1981-05-26

Family

ID=15191932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13714879A Pending JPS5661151A (en) 1979-10-23 1979-10-23 Package semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5661151A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858350U (en) * 1981-10-14 1983-04-20 株式会社東芝 IC package
JPS6057657A (en) * 1983-09-07 1985-04-03 Mitsubishi Electric Corp Composite semiconductor element
JPS60220961A (en) * 1984-04-17 1985-11-05 Toshiba Corp Semiconductor memory device
US4907979A (en) * 1984-04-25 1990-03-13 Amp Incorporated Surface mount, miniature, bussing connector
US6885106B1 (en) 2001-01-11 2005-04-26 Tessera, Inc. Stacked microelectronic assemblies and methods of making same
US6897090B2 (en) 1994-12-29 2005-05-24 Tessera, Inc. Method of making a compliant integrated circuit package
US6913949B2 (en) 2001-10-09 2005-07-05 Tessera, Inc. Stacked packages
US7053485B2 (en) 2002-08-16 2006-05-30 Tessera, Inc. Microelectronic packages with self-aligning features
USRE45463E1 (en) 2003-11-12 2015-04-14 Tessera, Inc. Stacked microelectronic assemblies with central contacts

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858350U (en) * 1981-10-14 1983-04-20 株式会社東芝 IC package
JPS6057657A (en) * 1983-09-07 1985-04-03 Mitsubishi Electric Corp Composite semiconductor element
JPH0219628B2 (en) * 1983-09-07 1990-05-02 Mitsubishi Electric Corp
JPS60220961A (en) * 1984-04-17 1985-11-05 Toshiba Corp Semiconductor memory device
US4907979A (en) * 1984-04-25 1990-03-13 Amp Incorporated Surface mount, miniature, bussing connector
US6897090B2 (en) 1994-12-29 2005-05-24 Tessera, Inc. Method of making a compliant integrated circuit package
US6885106B1 (en) 2001-01-11 2005-04-26 Tessera, Inc. Stacked microelectronic assemblies and methods of making same
US6913949B2 (en) 2001-10-09 2005-07-05 Tessera, Inc. Stacked packages
US7053485B2 (en) 2002-08-16 2006-05-30 Tessera, Inc. Microelectronic packages with self-aligning features
USRE45463E1 (en) 2003-11-12 2015-04-14 Tessera, Inc. Stacked microelectronic assemblies with central contacts

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