JPS551162A - Semiconductor integreted circuit - Google Patents

Semiconductor integreted circuit

Info

Publication number
JPS551162A
JPS551162A JP715279A JP715279A JPS551162A JP S551162 A JPS551162 A JP S551162A JP 715279 A JP715279 A JP 715279A JP 715279 A JP715279 A JP 715279A JP S551162 A JPS551162 A JP S551162A
Authority
JP
Japan
Prior art keywords
regions
type
region
substrate
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP715279A
Other languages
Japanese (ja)
Inventor
Masayoshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP715279A priority Critical patent/JPS551162A/en
Publication of JPS551162A publication Critical patent/JPS551162A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE: To provide a semiconductor integrated circuit wherein two P type regions are diffusion-formed in an N type substrate, an N type region is provided in one of said regions, another P type region is connected to said region by an outside conductive line to generate an electrostatic capacity, thereby to reduce the tip area upon the integration.
CONSTITUTION: P type regions P2 and P3 are diffusion-formed in an N type semiconductor substrate N1, and further an N type region N2 is provided in the region P2 and an N type region N3 is provided in the substrate 1 between the regions P2 and P3. In this manner, a NPN transistor 1 is constituted by regions N1, P2 and N2, and the space between the region P3 and the substrate N1 is used as a diode. Thereafter, the regions P3 and N2 are connected to each other by an outside conductive wire, and a condenser is produced between these regions. According to this arrangement, an electrostatic capacity can be produced only by diffusion, and the manufacturing process becomes extremely easy.
COPYRIGHT: (C)1980,JPO&Japio
JP715279A 1979-01-26 1979-01-26 Semiconductor integreted circuit Pending JPS551162A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP715279A JPS551162A (en) 1979-01-26 1979-01-26 Semiconductor integreted circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP715279A JPS551162A (en) 1979-01-26 1979-01-26 Semiconductor integreted circuit

Publications (1)

Publication Number Publication Date
JPS551162A true JPS551162A (en) 1980-01-07

Family

ID=11658087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP715279A Pending JPS551162A (en) 1979-01-26 1979-01-26 Semiconductor integreted circuit

Country Status (1)

Country Link
JP (1) JPS551162A (en)

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