JPS641875B2 - - Google Patents

Info

Publication number
JPS641875B2
JPS641875B2 JP58083560A JP8356083A JPS641875B2 JP S641875 B2 JPS641875 B2 JP S641875B2 JP 58083560 A JP58083560 A JP 58083560A JP 8356083 A JP8356083 A JP 8356083A JP S641875 B2 JPS641875 B2 JP S641875B2
Authority
JP
Japan
Prior art keywords
output
signal
memory
circuit
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58083560A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59210583A (ja
Inventor
Hitoshi Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GE Healthcare Japan Corp
Original Assignee
Yokogawa Medical Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Medical Systems Ltd filed Critical Yokogawa Medical Systems Ltd
Priority to JP58083560A priority Critical patent/JPS59210583A/ja
Publication of JPS59210583A publication Critical patent/JPS59210583A/ja
Publication of JPS641875B2 publication Critical patent/JPS641875B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
JP58083560A 1983-05-13 1983-05-13 メモリの出力制御方式 Granted JPS59210583A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58083560A JPS59210583A (ja) 1983-05-13 1983-05-13 メモリの出力制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58083560A JPS59210583A (ja) 1983-05-13 1983-05-13 メモリの出力制御方式

Publications (2)

Publication Number Publication Date
JPS59210583A JPS59210583A (ja) 1984-11-29
JPS641875B2 true JPS641875B2 (enrdf_load_stackoverflow) 1989-01-12

Family

ID=13805894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58083560A Granted JPS59210583A (ja) 1983-05-13 1983-05-13 メモリの出力制御方式

Country Status (1)

Country Link
JP (1) JPS59210583A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553037A (en) * 1978-06-20 1980-01-10 Nec Corp Input/output processor
JPS56152025A (en) * 1980-04-23 1981-11-25 Mitsubishi Electric Corp Data selecting circuit

Also Published As

Publication number Publication date
JPS59210583A (ja) 1984-11-29

Similar Documents

Publication Publication Date Title
JP2999845B2 (ja) シリアルアクセスメモリの倍速コントロール方式
JP3468140B2 (ja) メモリモジュールシステム
US5489865A (en) Circuit for filtering asynchronous metastability of cross-coupled logic gates
US5648931A (en) High speed synchronous logic data latch apparatus
US5522048A (en) Low-power area-efficient and robust asynchronous-to-synchronous interface
US6243777B1 (en) Circuit for preventing bus contention
US5903508A (en) Input buffer of memory device for reducing current consumption in standby mode
JPS641875B2 (enrdf_load_stackoverflow)
JPH0783274B2 (ja) 集積電子マルチプレクサ回路
JP2509632B2 (ja) デ―タ入出力装置
US5539887A (en) Input buffer circuit for a microprocessor which prevents improper data input
JP3459542B2 (ja) シリアルデータ転送装置
JPH05274258A (ja) データ処理装置間の信号伝達方法
JPS5855485Y2 (ja) 情報処理装置
JP2867480B2 (ja) メモリ切替回路
JPH02276348A (ja) 伝送方式
KR100199190B1 (ko) 데이타 포착회로
KR920004415B1 (ko) 데이타 전송회로 및 방법
KR900005452B1 (ko) 마이크로 프로세서의 데이터 처리속도를 개선한 회로
JP3158530B2 (ja) 半導体メモリ装置
JPH04155481A (ja) マイクロプロセッサ
JPS59123026A (ja) 非同期バスにおける応答信号出力方式
JPH06266609A (ja) マイクロコンピュータ
JPS63209321A (ja) 大規模集積回路の内部回路切換装置
JPS5932026A (ja) デ−タ転送タイミング制御方式