JPS6413759A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6413759A
JPS6413759A JP16864987A JP16864987A JPS6413759A JP S6413759 A JPS6413759 A JP S6413759A JP 16864987 A JP16864987 A JP 16864987A JP 16864987 A JP16864987 A JP 16864987A JP S6413759 A JPS6413759 A JP S6413759A
Authority
JP
Japan
Prior art keywords
type
oxide film
layer
substrate
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16864987A
Other languages
Japanese (ja)
Other versions
JP2654383B2 (en
Inventor
Masatoshi Kimura
Takeaki Okabe
Mitsuzo Sakamoto
Koichiro Satonaka
Toyomasa Koda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62168649A priority Critical patent/JP2654383B2/en
Publication of JPS6413759A publication Critical patent/JPS6413759A/en
Application granted granted Critical
Publication of JP2654383B2 publication Critical patent/JP2654383B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase breakdown strength by changing a p-type epitaxial layer except a recessed section in an n<+> substrate into an n type by connecting the rise-up of a phosphorus buried layer diffused to the n<+> substrate and an antimony-doped n<+> diffusion layer formed to the p-type epitaxial layer. CONSTITUTION:A high-concentration n-type layer 51 is shaped onto an antimony- doped n-type silicon substrate 1 and oxidized, and an oxide film 2 is removed to bore a window. A recessed section is formed through anisotropic etching, using the oxide film 2 as an etching mask. The oxide film is removed, a p-type epitaixal layer 3 is grown in size thicker than the depth of the recessed section, and the surface is flattened. Antimony is deposited onto a power MOS section and a circuit section, employing the oxide film 2 as a mask, and an n<+> buried layer 5 is extended and diffused, thus connecting the power MOS section to the n<+> substrate 1. An n-type epitaxial layer 4 is grown and oxidized, windows are bored to the oxide film 2, and boron is deposited. When deep n-type diffusion layers 53 are shaped, p-type isolation diffusion layers 6 reach the p-type epitaxial layer 3, and island isolations by p-n junctions are formed. Accordingly, the coexistence of high breakdown strength isolation and low ON-resistance power MOSFET can be realized easily on the same chip.
JP62168649A 1987-07-08 1987-07-08 Method for manufacturing semiconductor device Expired - Fee Related JP2654383B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62168649A JP2654383B2 (en) 1987-07-08 1987-07-08 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62168649A JP2654383B2 (en) 1987-07-08 1987-07-08 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6413759A true JPS6413759A (en) 1989-01-18
JP2654383B2 JP2654383B2 (en) 1997-09-17

Family

ID=15871943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62168649A Expired - Fee Related JP2654383B2 (en) 1987-07-08 1987-07-08 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2654383B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7973405B2 (en) 2003-02-14 2011-07-05 Hitachi, Ltd. Integrated circuit for driving semiconductor device and power converter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61285750A (en) * 1985-06-12 1986-12-16 Nissan Motor Co Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61285750A (en) * 1985-06-12 1986-12-16 Nissan Motor Co Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7973405B2 (en) 2003-02-14 2011-07-05 Hitachi, Ltd. Integrated circuit for driving semiconductor device and power converter

Also Published As

Publication number Publication date
JP2654383B2 (en) 1997-09-17

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees