JPS6412353U - - Google Patents
Info
- Publication number
- JPS6412353U JPS6412353U JP10713287U JP10713287U JPS6412353U JP S6412353 U JPS6412353 U JP S6412353U JP 10713287 U JP10713287 U JP 10713287U JP 10713287 U JP10713287 U JP 10713287U JP S6412353 U JPS6412353 U JP S6412353U
- Authority
- JP
- Japan
- Prior art keywords
- time
- signal
- pulse signal
- relay
- rise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Keying Circuit Devices (AREA)
- Relay Circuits (AREA)
Description
第１図は本考案の一実施例によるリレー制御回
路の要部波形図、第２図は従来のリレー制御回路
図、第３図は同要部波形図である。
１……制御素子（マイコン）、２……同期信号
発生回路、３，３Ａ……パルス信号、４……接点
、５……リレー、６……リレー駆動信号。
FIG. 1 is a waveform diagram of a main part of a relay control circuit according to an embodiment of the present invention, FIG. 2 is a diagram of a conventional relay control circuit, and FIG. 3 is a waveform diagram of the main part of the same. 1...Control element (microcomputer), 2...Synchronizing signal generation circuit, 3, 3A...Pulse signal, 4...Contact, 5...Relay, 6...Relay drive signal.
Claims (1)
生回路２とその信号を入力する制御素子１と制御
素子１のリレー駆動信号６出力により開閉するリ
レー５とを備え、交流電源に同期したパルス信号
３の立下りから次のパルス信号の立上りまでの時
間Ｔとその立上りからリレー駆動信号６を出力す
るまでの時間Ｔ０Ｎとを制御素子１に記憶させ、
電圧変動した電源に同期したパルス信号３Ａの立
下りから次のパルス信号３Ａの立上りまでの時間
Ｔ１を時間Ｔと比較演算し、その時間差分Ｔ１−
Ｔに対応してリレー駆動信号６を出力するまでの
時間Ｔ０Ｎを変化させることを特徴とするリレー
制御回路。 A pulse signal 3 synchronized with the AC power supply includes a synchronization signal generation circuit 2 that generates a signal synchronized with the AC power supply, a control element 1 into which the signal is input, and a relay 5 that opens and closes according to the relay drive signal 6 output of the control element 1. The control element 1 stores the time T from the fall of the pulse signal to the rise of the next pulse signal, and the time T 0 N from the rise to the output of the relay drive signal 6,
The time T1 from the fall of the pulse signal 3A to the rise of the next pulse signal 3A that is synchronized with the power supply whose voltage has fluctuated is compared with the time T, and the time difference T1- is calculated.
A relay control circuit characterized in that a time T 0 N until outputting a relay drive signal 6 is changed in accordance with T.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10713287U JPS6412353U (en) | 1987-07-13 | 1987-07-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10713287U JPS6412353U (en) | 1987-07-13 | 1987-07-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6412353U true JPS6412353U (en) | 1989-01-23 |
Family
ID=31341267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10713287U Pending JPS6412353U (en) | 1987-07-13 | 1987-07-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6412353U (en) |
-
1987
- 1987-07-13 JP JP10713287U patent/JPS6412353U/ja active Pending
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