JPS6410974B2 - - Google Patents

Info

Publication number
JPS6410974B2
JPS6410974B2 JP58044902A JP4490283A JPS6410974B2 JP S6410974 B2 JPS6410974 B2 JP S6410974B2 JP 58044902 A JP58044902 A JP 58044902A JP 4490283 A JP4490283 A JP 4490283A JP S6410974 B2 JPS6410974 B2 JP S6410974B2
Authority
JP
Japan
Prior art keywords
synchronization
frame
signal
frame synchronization
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58044902A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59171235A (ja
Inventor
Koichi Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58044902A priority Critical patent/JPS59171235A/ja
Publication of JPS59171235A publication Critical patent/JPS59171235A/ja
Publication of JPS6410974B2 publication Critical patent/JPS6410974B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58044902A 1983-03-17 1983-03-17 フレ−ム同期方法 Granted JPS59171235A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58044902A JPS59171235A (ja) 1983-03-17 1983-03-17 フレ−ム同期方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58044902A JPS59171235A (ja) 1983-03-17 1983-03-17 フレ−ム同期方法

Publications (2)

Publication Number Publication Date
JPS59171235A JPS59171235A (ja) 1984-09-27
JPS6410974B2 true JPS6410974B2 (enExample) 1989-02-22

Family

ID=12704397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58044902A Granted JPS59171235A (ja) 1983-03-17 1983-03-17 フレ−ム同期方法

Country Status (1)

Country Link
JP (1) JPS59171235A (enExample)

Also Published As

Publication number Publication date
JPS59171235A (ja) 1984-09-27

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