JPS6384650U - - Google Patents
Info
- Publication number
- JPS6384650U JPS6384650U JP17753586U JP17753586U JPS6384650U JP S6384650 U JPS6384650 U JP S6384650U JP 17753586 U JP17753586 U JP 17753586U JP 17753586 U JP17753586 U JP 17753586U JP S6384650 U JPS6384650 U JP S6384650U
- Authority
- JP
- Japan
- Prior art keywords
- bus
- signal
- access permission
- processor
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims 1
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Multi Processors (AREA)
- Bus Control (AREA)
Description
第１図は本考案によるバス管理装置の一実施例
を示すブロツク図、第２図は従来装置を示すブロ
ツク図である。
１ａ，１ｂ…プロセツサ、２…バス、３…バス
調停回路、４…アクセス許可空間発生回路、５…
アクセス空間チエツク回路、６…バツフア回路、
７…アドレス信号ライン。
FIG. 1 is a block diagram showing an embodiment of a bus management device according to the present invention, and FIG. 2 is a block diagram showing a conventional device. 1a, 1b...processor, 2...bus, 3...bus arbitration circuit, 4...access permission space generation circuit, 5...
Access space check circuit, 6... buffer circuit,
7...Address signal line.
Claims (1)
調停回路が上記バスを使用する何れかのプロセツ
サを定めるようにしたバス管理装置において、 上記バス調停回路からの出力信号に基づき、上
記バスの使用権を有する上記プロセツサがアクセ
スし得るアクセス許可空間信号を出力するアクセ
ス許可空間発生回路と、 上記バスの使用権を有する上記プロセツサから
上記バスに出力されたアドレス信号が上記アクセ
ス許可空間信号に含まれていない場合に異常検出
信号を出力すると共に、上記バス上のアドレス信
号を強制的に所定アドレスに変更させるアクセス
空間チエツク回路とを備えたことを特徴とするバ
ス管理装置。[Claims for Utility Model Registration] In a bus management device in which a plurality of processors share the same bus and a bus arbitration circuit determines which processor will use the bus, an output signal from the bus arbitration circuit an access permission space generation circuit that outputs an access permission space signal that can be accessed by the processor having the right to use the bus based on the above; An access space check circuit that outputs an abnormality detection signal when the access permission space signal is not included, and forcibly changes the address signal on the bus to a predetermined address. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17753586U JPS6384650U (en) | 1986-11-20 | 1986-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17753586U JPS6384650U (en) | 1986-11-20 | 1986-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6384650U true JPS6384650U (en) | 1988-06-03 |
Family
ID=31118823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17753586U Pending JPS6384650U (en) | 1986-11-20 | 1986-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384650U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6057091A (en) * | 1983-09-06 | 1985-04-02 | 日本リモテツク株式会社 | Detachable pipe joint |
-
1986
- 1986-11-20 JP JP17753586U patent/JPS6384650U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6057091A (en) * | 1983-09-06 | 1985-04-02 | 日本リモテツク株式会社 | Detachable pipe joint |
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