JPS63168549U - - Google Patents
Info
- Publication number
- JPS63168549U JPS63168549U JP5822287U JP5822287U JPS63168549U JP S63168549 U JPS63168549 U JP S63168549U JP 5822287 U JP5822287 U JP 5822287U JP 5822287 U JP5822287 U JP 5822287U JP S63168549 U JPS63168549 U JP S63168549U
- Authority
- JP
- Japan
- Prior art keywords
- bus
- address
- selector
- cycle
- main memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010365 information processing Effects 0.000 claims description 2
- 230000004048 modification Effects 0.000 claims description 2
- 238000012986 modification Methods 0.000 claims description 2
- 238000004092 self-diagnosis Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Description
図は本考案による情報処理装置の構成を表わす
図である。
１０…中央処理装置ＣＰＵ、１１…ＣＰＵ内部
機能、１２…比較器、２０…主記憶装置、２１…
主記憶内部機能、２２…選択器、３０…マザー・
ボード・バス、ＡＢ…アドレス・バス、ＤＢ…デ
ータ・バス、ＡＭ…アドレス修飾線。
The figure is a diagram showing the configuration of an information processing device according to the present invention. DESCRIPTION OF SYMBOLS 10...Central processing unit CPU, 11...CPU internal function, 12...Comparator, 20...Main storage device, 21...
Main memory internal function, 22...Selector, 30...Mother
Board bus, AB...address bus, DB...data bus, AM...address modification line.
Claims (1)
バス・サイクルが通常のバス・サイクルか自己診
断バス・サイクルか指定されるアドレス修飾線を
設けたマザー・ボード・バスと、前記自己診断バ
ス・サイクルにおいて前記アドレス・バスの内容
を前記データ・バスに出力する選択器を設けた主
記憶装置と、前記自己診断バス・サイクルにおい
て診断情報を出力し前記アドレス・バスの内容と
前記データ・バスの内容が一致しているかどうか
を比較する比較器を設けた中央処理装置とを備え
た情報処理装置。 A motherboard bus that includes an address bus and a data bus and is provided with an address modification line that specifies whether the current bus cycle is a normal bus cycle or a self-diagnosis bus cycle; a main memory device provided with a selector for outputting the contents of the address bus to the data bus; and a main memory device provided with a selector for outputting the contents of the address bus to the data bus; An information processing device comprising a central processing unit provided with a comparator for comparing whether or not they match.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5822287U JPH0441394Y2 (en) | 1987-04-17 | 1987-04-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5822287U JPH0441394Y2 (en) | 1987-04-17 | 1987-04-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63168549U true JPS63168549U (en) | 1988-11-02 |
| JPH0441394Y2 JPH0441394Y2 (en) | 1992-09-29 |
Family
ID=30888611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5822287U Expired JPH0441394Y2 (en) | 1987-04-17 | 1987-04-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441394Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02287744A (en) * | 1989-04-28 | 1990-11-27 | Yokogawa Electric Corp | Bus master device |
-
1987
- 1987-04-17 JP JP5822287U patent/JPH0441394Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02287744A (en) * | 1989-04-28 | 1990-11-27 | Yokogawa Electric Corp | Bus master device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0441394Y2 (en) | 1992-09-29 |
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