JPS62195863U - - Google Patents
Info
- Publication number
- JPS62195863U JPS62195863U JP8206886U JP8206886U JPS62195863U JP S62195863 U JPS62195863 U JP S62195863U JP 8206886 U JP8206886 U JP 8206886U JP 8206886 U JP8206886 U JP 8206886U JP S62195863 U JPS62195863 U JP S62195863U
- Authority
- JP
- Japan
- Prior art keywords
- external ram
- generation circuit
- main system
- access device
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Information Transfer Systems (AREA)
Description
第１図は本考案の一実施例を示す構成ブロツク
図、第２図は第１図の装置の波形図、第３図は従
来装置の構成図である。
Ｍ…メインシステム、Ｓ…サブシステム、ＢＴ
…バストランシーバ、…リード信号。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of the device shown in FIG. 1, and FIG. 3 is a diagram showing the configuration of a conventional device. M...Main system, S...Subsystem, BT
…Bus transceiver, …Read signal.
Claims (1)
外部ＲＡＭにアクセスする際に、このメインシス
テム側のＣＰＵの動作をアクセスの伝達遅延時間
に相当する時間一時停止させるＷＡＩＴ発生回路
を備えた外部ＲＡＭアクセス装置において、 前記アクセス動作が読込み動作であるときはＷ
ＡＩＴ信号を発生し、書込み動作であるときはＷ
ＡＩＴ信号を発生しないように前記ＷＡＩＴ発生
回路を構成したことを特徴とする外部ＲＡＭアク
セス装置。[Claims for Utility Model Registration] A WAIT generation circuit that temporarily suspends the operation of the CPU on the main system side for a time corresponding to the access transmission delay time when the main system accesses the external RAM accommodated in the subsystem. In the external RAM access device equipped with the above, when the access operation is a read operation, W
Generates AIT signal, and outputs W when it is a write operation.
An external RAM access device characterized in that the WAIT generation circuit is configured so as not to generate an AIT signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8206886U JPS62195863U (en) | 1986-05-30 | 1986-05-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8206886U JPS62195863U (en) | 1986-05-30 | 1986-05-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62195863U true JPS62195863U (en) | 1987-12-12 |
Family
ID=30934386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8206886U Pending JPS62195863U (en) | 1986-05-30 | 1986-05-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62195863U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017138979A (en) * | 2016-01-29 | 2017-08-10 | 株式会社半導体エネルギー研究所 | Semiconductor device, electronic component, and electronic device |
-
1986
- 1986-05-30 JP JP8206886U patent/JPS62195863U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017138979A (en) * | 2016-01-29 | 2017-08-10 | 株式会社半導体エネルギー研究所 | Semiconductor device, electronic component, and electronic device |
| US10950297B2 (en) | 2016-01-29 | 2021-03-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, electronic component, and electronic device |
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