JPS6373943U - - Google Patents
Info
- Publication number
- JPS6373943U JPS6373943U JP1986168426U JP16842686U JPS6373943U JP S6373943 U JPS6373943 U JP S6373943U JP 1986168426 U JP1986168426 U JP 1986168426U JP 16842686 U JP16842686 U JP 16842686U JP S6373943 U JPS6373943 U JP S6373943U
- Authority
- JP
- Japan
- Prior art keywords
- extending
- package
- protrude
- resin
- metal piece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims 2
- 238000007789 sealing Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図ａおよびｂは本考案に係る半導体装置の
チツプ封止前の状態を示す平面図と側面図、第２
図は同じく半導体装置の完成品を示す斜視図、第
３図は第２実施例を示す斜視図、第４図ａおよび
ｂは第３実施例を示す平面図と側面図、第５図は
その完成品を示す斜視図、第６図は第４実施例を
示す斜視図、第７図ａおよびｂは従来の半導体装
置のチツプ封止前の状態を示す平面図と側面図、
第８図はその完成品を示す斜視図である。
１……リードフレーム、２〜５……外部リード
、６〜９……内部電極、１８……パツケージ、３
１〜３５……延在片、３６……連結片、３７……
樹脂受け。
1a and 1b are a plan view and a side view showing the state of the semiconductor device according to the present invention before chip sealing;
The figure is a perspective view showing the finished product of the semiconductor device, FIG. 3 is a perspective view showing the second embodiment, FIGS. 4 a and b are a plan view and side view showing the third embodiment, and FIG. 6 is a perspective view showing the fourth embodiment; FIGS. 7a and 7b are plan and side views showing the state of the conventional semiconductor device before chip sealing;
FIG. 8 is a perspective view showing the completed product. 1...Lead frame, 2-5...External lead, 6-9...Internal electrode, 18...Package, 3
1 to 35...extending piece, 36...connecting piece, 37...
Resin receiver.
Claims (1)
側方に突出する複数の外部リードおよびこれら外
部リードに各々接続する内部電極を有する金属片
と、この金属片の内部電極に前記外部リードと反
対側に突出するように設けられかつ連結片によつ
て分断可能に接続された複数の延在片とを備え、
前記パツケージの延在片側に前記連結片の長手方
向に延在する樹脂受けを一体に設けたことを特徴
とする半導体装置。 A metal piece having a plurality of external leads whose parts are sealed with resin by a package and which protrude to one side and internal electrodes connected to each of these external leads, and an internal electrode of this metal piece opposite to the external lead. a plurality of extending pieces provided so as to protrude to the side and separably connected by connecting pieces;
A semiconductor device characterized in that a resin receiver extending in the longitudinal direction of the connecting piece is integrally provided on one extending side of the package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986168426U JPS6373943U (en) | 1986-10-31 | 1986-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986168426U JPS6373943U (en) | 1986-10-31 | 1986-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6373943U true JPS6373943U (en) | 1988-05-17 |
Family
ID=31101297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986168426U Pending JPS6373943U (en) | 1986-10-31 | 1986-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6373943U (en) |
-
1986
- 1986-10-31 JP JP1986168426U patent/JPS6373943U/ja active Pending