JPS636751U - - Google Patents

Info

Publication number
JPS636751U
JPS636751U JP10030986U JP10030986U JPS636751U JP S636751 U JPS636751 U JP S636751U JP 10030986 U JP10030986 U JP 10030986U JP 10030986 U JP10030986 U JP 10030986U JP S636751 U JPS636751 U JP S636751U
Authority
JP
Japan
Prior art keywords
conductive layer
lead frame
land portion
electronic circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10030986U
Other languages
English (en)
Other versions
JPH0334920Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10030986U priority Critical patent/JPH0334920Y2/ja
Publication of JPS636751U publication Critical patent/JPS636751U/ja
Application granted granted Critical
Publication of JPH0334920Y2 publication Critical patent/JPH0334920Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図は、本考案に係る電子回路装置の縦断面
図、第2図は、従来の電子回路装置の縦断面図で
ある。 21……絶縁板、22……導電層、23……素
子取付部、24……ランド部、25……リード、
28……素子、29……電極、32……ダミー体
、34……樹脂。

Claims (1)

    【実用新案登録請求の範囲】
  1. 表面に導電層及び素子取付部が形成された絶縁
    板を、リードフレームのランド部に接着し、前記
    素子取付部に、素子を取付けるとともに、素子の
    電極と前記導電層、及び、導電層と前記リードフ
    レームのリードとを接続し、全体を樹脂モールド
    してなる電子回路装置において、前記リードフレ
    ームのランド部裏面に、ランド部表面側に接着し
    た構成部品と略同一熱膨脹を有するダミー体を接
    着したことを特徴とする電子回路装置。
JP10030986U 1986-06-30 1986-06-30 Expired JPH0334920Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10030986U JPH0334920Y2 (ja) 1986-06-30 1986-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10030986U JPH0334920Y2 (ja) 1986-06-30 1986-06-30

Publications (2)

Publication Number Publication Date
JPS636751U true JPS636751U (ja) 1988-01-18
JPH0334920Y2 JPH0334920Y2 (ja) 1991-07-24

Family

ID=30970013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10030986U Expired JPH0334920Y2 (ja) 1986-06-30 1986-06-30

Country Status (1)

Country Link
JP (1) JPH0334920Y2 (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461556U (ja) * 1977-10-07 1979-04-28
JPS58440U (ja) * 1981-06-25 1983-01-05 富士通株式会社 プラスチツクパツケ−ジ
JPS58441U (ja) * 1981-06-25 1983-01-05 富士通株式会社 プラスチツクパツケ−ジ
JPS61136249A (ja) * 1984-12-06 1986-06-24 Nec Kansai Ltd ハイブリツドic

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439370B2 (ja) * 1971-11-20 1979-11-27
JPS58441B2 (ja) * 1978-07-08 1983-01-06 工業技術院長 キトサンの製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461556U (ja) * 1977-10-07 1979-04-28
JPS58440U (ja) * 1981-06-25 1983-01-05 富士通株式会社 プラスチツクパツケ−ジ
JPS58441U (ja) * 1981-06-25 1983-01-05 富士通株式会社 プラスチツクパツケ−ジ
JPS61136249A (ja) * 1984-12-06 1986-06-24 Nec Kansai Ltd ハイブリツドic

Also Published As

Publication number Publication date
JPH0334920Y2 (ja) 1991-07-24

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