JPS6362108B2 - - Google Patents

Info

Publication number
JPS6362108B2
JPS6362108B2 JP54136661A JP13666179A JPS6362108B2 JP S6362108 B2 JPS6362108 B2 JP S6362108B2 JP 54136661 A JP54136661 A JP 54136661A JP 13666179 A JP13666179 A JP 13666179A JP S6362108 B2 JPS6362108 B2 JP S6362108B2
Authority
JP
Japan
Prior art keywords
type
polycrystalline silicon
source
silicon film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54136661A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5660063A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13666179A priority Critical patent/JPS5660063A/ja
Publication of JPS5660063A publication Critical patent/JPS5660063A/ja
Publication of JPS6362108B2 publication Critical patent/JPS6362108B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP13666179A 1979-10-23 1979-10-23 Manufacture of semiconductor device Granted JPS5660063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13666179A JPS5660063A (en) 1979-10-23 1979-10-23 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13666179A JPS5660063A (en) 1979-10-23 1979-10-23 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5660063A JPS5660063A (en) 1981-05-23
JPS6362108B2 true JPS6362108B2 (fr) 1988-12-01

Family

ID=15180536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13666179A Granted JPS5660063A (en) 1979-10-23 1979-10-23 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5660063A (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59115554A (ja) * 1982-12-22 1984-07-04 Toshiba Corp 半導体装置の製造方法
DE3304588A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene
JPS59208773A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS59208772A (ja) * 1983-05-12 1984-11-27 Nec Corp 半導体装置の製造方法
JPS6165470A (ja) * 1984-09-07 1986-04-04 Hitachi Ltd 半導体集積回路装置
JPS61139058A (ja) * 1984-12-11 1986-06-26 Seiko Epson Corp 半導体製造装置
US4648175A (en) * 1985-06-12 1987-03-10 Ncr Corporation Use of selectively deposited tungsten for contact formation and shunting metallization
JP2807226B2 (ja) * 1987-09-12 1998-10-08 ソニー株式会社 半導体装置の製造方法
JPH0226021A (ja) * 1988-07-14 1990-01-29 Matsushita Electron Corp 多層配線の形成方法
JPH0758701B2 (ja) * 1989-06-08 1995-06-21 株式会社東芝 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS5660063A (en) 1981-05-23

Similar Documents

Publication Publication Date Title
US4927776A (en) Method of producing semiconductor integrated circuit device including bipolar transistor and insulated gate field effect transistor
US4575920A (en) Method of manufacturing an insulated-gate field-effect transistor
JP2605008B2 (ja) 半導体装置の製造方法
US4663825A (en) Method of manufacturing semiconductor device
KR0133540B1 (ko) 섈로우 npn 에미터 및 mosfet 소오스/드레인을 형성하기 위한 bicmos 방법
US5340751A (en) Method of manufacturing a BiMOS device
US5061646A (en) Method for forming a self-aligned bipolar transistor
JPH04225529A (ja) 微量の不純物を添加したドレイン(ldd)を有する集積回路構造体を製作する改良された方法
US4420870A (en) Method of controlling channel length by implanting through polycrystalline and single crystalline regions followed by diffusion anneal
US4822754A (en) Fabrication of FETs with source and drain contacts aligned with the gate electrode
US4929570A (en) Selective epitaxy BiCMOS process
US5091322A (en) Semiconductor device and method of manufacturing the same
JPH058587B2 (fr)
KR0178551B1 (ko) 반도체 집적 회로 제조 방법
JPS6362108B2 (fr)
US5116770A (en) Method for fabricating bipolar semiconductor devices
JPH0324069B2 (fr)
US5236851A (en) Method for fabricating semiconductor devices
JP2504567B2 (ja) 半導体装置の製造方法
JPS6360549B2 (fr)
JPH098135A (ja) 半導体装置の製造方法
US5227317A (en) Method of manufacturing semiconductor integrated circuit bipolar transistor device
JP2575876B2 (ja) 半導体装置
JPH065696B2 (ja) 半導体装置の製造方法
JP2654011B2 (ja) 半導体装置の製造方法