JPS6352782B2 - - Google Patents

Info

Publication number
JPS6352782B2
JPS6352782B2 JP58020053A JP2005383A JPS6352782B2 JP S6352782 B2 JPS6352782 B2 JP S6352782B2 JP 58020053 A JP58020053 A JP 58020053A JP 2005383 A JP2005383 A JP 2005383A JP S6352782 B2 JPS6352782 B2 JP S6352782B2
Authority
JP
Japan
Prior art keywords
region
semiconductor substrate
voltage
output buffer
channel stopper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58020053A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59145560A (ja
Inventor
Yoshihiro Hosokawa
Osamu Koseki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP58020053A priority Critical patent/JPS59145560A/ja
Publication of JPS59145560A publication Critical patent/JPS59145560A/ja
Publication of JPS6352782B2 publication Critical patent/JPS6352782B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP58020053A 1983-02-09 1983-02-09 出力バツフア装置 Granted JPS59145560A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58020053A JPS59145560A (ja) 1983-02-09 1983-02-09 出力バツフア装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58020053A JPS59145560A (ja) 1983-02-09 1983-02-09 出力バツフア装置

Publications (2)

Publication Number Publication Date
JPS59145560A JPS59145560A (ja) 1984-08-21
JPS6352782B2 true JPS6352782B2 (enrdf_load_stackoverflow) 1988-10-20

Family

ID=12016323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58020053A Granted JPS59145560A (ja) 1983-02-09 1983-02-09 出力バツフア装置

Country Status (1)

Country Link
JP (1) JPS59145560A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0562352B1 (en) * 1992-03-26 1998-02-18 Texas Instruments Incorporated High voltage structures with oxide isolated source and RESURF drift region in bulk silicon
JPH1092946A (ja) * 1996-09-12 1998-04-10 Nec Ic Microcomput Syst Ltd 半導体集積回路

Also Published As

Publication number Publication date
JPS59145560A (ja) 1984-08-21

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