JPS6349835A - 演算処理装置 - Google Patents
演算処理装置Info
- Publication number
- JPS6349835A JPS6349835A JP61193204A JP19320486A JPS6349835A JP S6349835 A JPS6349835 A JP S6349835A JP 61193204 A JP61193204 A JP 61193204A JP 19320486 A JP19320486 A JP 19320486A JP S6349835 A JPS6349835 A JP S6349835A
- Authority
- JP
- Japan
- Prior art keywords
- digit
- signal
- sum
- circuit
- addition
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61193204A JPS6349835A (ja) | 1986-08-19 | 1986-08-19 | 演算処理装置 |
| US07/086,967 US4866657A (en) | 1986-07-18 | 1987-08-18 | Adder circuitry utilizing redundant signed digit operands |
| US03/239,243 US5031136A (en) | 1986-06-27 | 1990-05-07 | Signed-digit arithmetic processing units with binary operands |
| US07/599,275 US5153847A (en) | 1986-06-27 | 1990-10-16 | Arithmetic processor using signed digit representation of internal operands |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61193204A JPS6349835A (ja) | 1986-08-19 | 1986-08-19 | 演算処理装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6349835A true JPS6349835A (ja) | 1988-03-02 |
| JPH0528407B2 JPH0528407B2 (enrdf_load_stackoverflow) | 1993-04-26 |
Family
ID=16304032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61193204A Granted JPS6349835A (ja) | 1986-06-27 | 1986-08-19 | 演算処理装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6349835A (enrdf_load_stackoverflow) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01163827A (ja) * | 1987-12-21 | 1989-06-28 | Hitachi Ltd | アドレス演算器 |
| JPH01297725A (ja) * | 1988-03-31 | 1989-11-30 | Texas Instr Inc <Ti> | 符号付ディジット加算器回路 |
| US8341203B2 (en) | 2004-11-08 | 2012-12-25 | Zhizhong Li | Computer technical solution of the digital engineering method of hybrid numeral carry system and carry line |
-
1986
- 1986-08-19 JP JP61193204A patent/JPS6349835A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01163827A (ja) * | 1987-12-21 | 1989-06-28 | Hitachi Ltd | アドレス演算器 |
| JPH01297725A (ja) * | 1988-03-31 | 1989-11-30 | Texas Instr Inc <Ti> | 符号付ディジット加算器回路 |
| US8341203B2 (en) | 2004-11-08 | 2012-12-25 | Zhizhong Li | Computer technical solution of the digital engineering method of hybrid numeral carry system and carry line |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0528407B2 (enrdf_load_stackoverflow) | 1993-04-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |