JPS6344296U

JPS6344296U -

Info

Publication number: JPS6344296U
Application number: JP13812386U
Authority: JP
Priority date: 1986-09-09
Filing date: 1986-09-09
Publication date: 1988-03-24
Also published as: JPH0430720Y2

Description

[Brief explanation of the drawing]

第１図は、この考案の一実施例を示す回路図、
第２図は、この考案による電源電圧と第２のチツ
プセレクト端子の信号変化を示すタイムチヤート
、第３図は、従来のメモリ回路の一例を示す回路
図、第４図は、電源をＯＮ／ＯＦＦする場合の電
圧の変化を示すタイムチヤート。１はＲＡＭ、２は電源回路、３はリセツト回路
、Ｓ１，Ｓ２は、それぞれ第１及び第２のチツプ
セレクト端子、ＷＥは書き込み制御入力端子であ
る。なお、各図中同一符号は同一又は相当部分を
示す。 FIG. 1 is a circuit diagram showing an embodiment of this invention.
FIG. 2 is a time chart showing changes in the power supply voltage and the signal at the second chip select terminal according to this invention. FIG. 3 is a circuit diagram showing an example of a conventional memory circuit. Time chart showing the change in voltage when turning off. 1 is a RAM, 2 is a power supply circuit, 3 is a reset circuit, S1 and S2 are first and second chip select terminals, respectively, and WE is a write control input terminal. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims

[Claims for Utility Model Registration] A battery backup device that is read and written under the control of a CPU (Central Processing Unit) and that can retain its stored contents using battery power if the power is cut off. has a circuit, and the above C
In addition to the first chip select terminal to which a chip select signal for selecting the chip from the PU is input, a second chip select terminal is provided, and when the voltage of the second chip select terminal is at the "L" level, In a memory circuit whose operation is prohibited, a means for applying an "H" level voltage from a power supply having the battery backup circuit to the second chip select terminal through a high resistance; a power supply that guarantees normal operation of the CPU; When the lower limit of the voltage is VH and the lower limit of the power supply voltage at which the CPU can operate is VL, when the CPU is connected to the same power supply and the voltage of this power supply is in the range from VL to VH, the voltage at its output terminal It is fixed at "L" level, and when the voltage of the above power supply is lower than VL, the impedance of the above output terminal is kept high impedance, and when the voltage of the above power supply exceeds VH from a value lower than VH, it exceeds VH. a reset circuit that outputs an "H" level voltage to the output terminal while the voltage of the power supply is maintained above VH after a predetermined delay time from the point in time, and the output terminal of the reset circuit is connected to the second chip. A memory circuit comprising a memory protection circuit by being connected to a select terminal.