JPS63155076U - - Google Patents
Info
- Publication number
- JPS63155076U JPS63155076U JP4671987U JP4671987U JPS63155076U JP S63155076 U JPS63155076 U JP S63155076U JP 4671987 U JP4671987 U JP 4671987U JP 4671987 U JP4671987 U JP 4671987U JP S63155076 U JPS63155076 U JP S63155076U
- Authority
- JP
- Japan
- Prior art keywords
- storage
- utility
- digital signal
- model registration
- storage means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005070 sampling Methods 0.000 claims description 3
- 230000005856 abnormality Effects 0.000 claims 2
- 238000001514 detection method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
Description
第１図は本考案の概略のブロツク図、第２図は
本考案の一実施例の主要部の構成を示すブロツク
図、第３図は本考案が適用される電源装置のブロ
ツク図、第４図は前記第２図の動作を示すフロー
チヤート、第５図はＩＣカード再生装置の概略の
構成図、第６図は従来の電源装置の一例を示すブ
ロツク図、第７図はその要部の詳細回路図である
。
２１…電流検出回路、２２…ＤＣ電圧検出手段
、２３…ＤＣ電圧低下検出手段、２４…出力過電
流検出手段、２５…出力過電圧検出手段、２６…
出力低電圧検出手段、３３…入出力回路、３４…
Ａ／Ｄ変換器、３４…ＣＰＵ、３８…ＩＣカード
、５１…電流・電圧検出手段、５２…Ａ／Ｄ変換
器、５３…サンプリング手段、５４…制御手段、
５５…記憶手段。
Fig. 1 is a schematic block diagram of the present invention, Fig. 2 is a block diagram showing the configuration of the main parts of an embodiment of the present invention, Fig. 3 is a block diagram of a power supply device to which the present invention is applied, and Fig. 4 Figure 5 is a flowchart showing the operation of Figure 2, Figure 5 is a schematic configuration diagram of an IC card reproducing device, Figure 6 is a block diagram showing an example of a conventional power supply device, and Figure 7 is a diagram of its main parts. It is a detailed circuit diagram. 21... Current detection circuit, 22... DC voltage detection means, 23... DC voltage drop detection means, 24... Output overcurrent detection means, 25... Output overvoltage detection means, 26...
Output low voltage detection means, 33... input/output circuit, 34...
A/D converter, 34... CPU, 38... IC card, 51... current/voltage detection means, 52... A/D converter, 53... sampling means, 54... control means,
55...Memory means.
Claims (1)
なくとも一方を検出する手段を有する故障記録装
置において、該手段から検出された信号をデイジ
タル信号に変換する手段、該デイジタル信号をサ
ンプリングする手段、該サンプリングによつて得
られたデータを予定のエリアに循環的に記録する
記憶手段、および異常検出後予定の時間前記記憶
手段に前記デイジタル信号の記録が続行されるよ
うに前記記憶手段を制御する手段とを具備したこ
とを特徴とする故障記録装置。 (2) 前記記憶装置に前記異常発生前後のデータ
が記憶されるようにしたことを特徴とする前記実
用新案登録請求の範囲第１項記載の故障記録装置
。 (3) 前記記憶装置がＩＣカードであることを特
徴とする前記実用新案登録請求の範囲第１項また
は第２項記載の故障記録装置。[Claims for Utility Model Registration] (1) In a fault recording device having means for detecting at least one of current and voltage at the main points of an electrical device, means for converting the signal detected from the means into a digital signal; means for sampling a digital signal; a storage means for cyclically recording data obtained by the sampling in a predetermined area; and a storage means for continuing recording of the digital signal in the storage means for a predetermined time after an abnormality is detected. and means for controlling the storage means. (2) The failure recording device according to claim 1 of the utility model registration, characterized in that data before and after the occurrence of the abnormality is stored in the storage device. (3) The failure recording device according to claim 1 or 2 of the utility model registration claim, wherein the storage device is an IC card.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4671987U JPH065646Y2 (en) | 1987-03-31 | 1987-03-31 | Failure recording device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4671987U JPH065646Y2 (en) | 1987-03-31 | 1987-03-31 | Failure recording device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63155076U true JPS63155076U (en) | 1988-10-12 |
| JPH065646Y2 JPH065646Y2 (en) | 1994-02-09 |
Family
ID=30866640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4671987U Expired - Lifetime JPH065646Y2 (en) | 1987-03-31 | 1987-03-31 | Failure recording device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH065646Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006101576A (en) * | 2004-09-28 | 2006-04-13 | Fuji Electric Systems Co Ltd | Power converter and failure analysis method |
-
1987
- 1987-03-31 JP JP4671987U patent/JPH065646Y2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006101576A (en) * | 2004-09-28 | 2006-04-13 | Fuji Electric Systems Co Ltd | Power converter and failure analysis method |
| JP4599969B2 (en) * | 2004-09-28 | 2010-12-15 | 富士電機システムズ株式会社 | Power converter and failure analysis method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH065646Y2 (en) | 1994-02-09 |
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