JPH01205257A - Integrated circuit - Google Patents

Abstract

PURPOSE:To read the contents of the RAM for the temporary storage of a microprocessor without the intervention of the microprocessor by stopping the action of the microprocessor when a specific signal is inputted to a control terminal, and switching data inputted from a data bus to a mode inputted to the RAM. CONSTITUTION:A microprocessor 10, a buffer circuit 40, a data selecting circuit 50 and an address selecting circuit 20 are connected in common by a control line, and the control line is connected to a control terminal 400. When the specific signal is inputted to the control terminal 400, the action of the microprocessor 10 is stopped, the address selecting circuit 20 inputs address data inputted from an address bus 200, to a random access memory (RAM) 30, and the data selecting circuit 50 is switched to the mode to input the data inputted from a data sub 300 to the RAM 30. Thus, without the intervention of the microprocessor 10, the contents of the RAM 30 for the temporary storage of the microprocessor 10 can be read.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to integrated circuits, and particularly to integrated circuits in which a microprocessor and a random access memory for temporarily storing data used by the microprocessor are implemented on the same chip. related to integrated circuits.

[Conventional technology]

Conventionally, in an integrated circuit in which a microprocessor and a random access memory that temporarily stores data used by the microprocessor are mounted on the same chip, the random access method is used to read the contents of the random access memory. - A method was used in which a microprocessor executed a microprogram to read the contents of the memory, and the contents of the random access memory were read externally via the microprocessor.

[Problem to be solved by the invention]

As mentioned above, in conventional integrated circuits, the microprocessor intervenes to read the contents of the built-in random access memory, so if the microprocessor becomes stalled, the built-in random access memory is read out.
There was a problem in that the contents of the access memory could not be read, and that the microprocessor had to intervene to read the contents of the built-in random access memory, and that intervention would change the internal state of the microprocessor.

The present invention was made in view of these circumstances, and
It is an object of the present invention to provide an integrated circuit capable of reading the contents of a random access memory for temporary storage of a microprocessor without intervention of the microprocessor.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a microprocessor that executes a microprogram, a random access memory that temporarily stores data used by the microprocessor, and a memory that is connected between the microprocessor and an external address bus. A buffer circuit is connected between the microprocessor and an external data bus to input the microinstructions input from the data bus to the microprocessor, and a buffer circuit that outputs address data output from the microprocessor to the address bus. a data selection circuit that inputs data input from the microprocessor to the random access memory; and a data selection circuit that is connected between the microprocessor and the random access memory and receives address data specified by the microprocessor or address data input from the address bus. The microprocessor, buffer circuit, data selection circuit, and address selection circuit are commonly connected by a control line, and this control line is connected to an external control terminal. At the same time, when a specific signal is input to this control terminal, the operation of the microprocessor is stopped, and the address selection circuit inputs the address data input from the address bus to the random access memory, and the data selection circuit The device is characterized in that it can be switched to a mode in which data input from a data bus is input to a random access memory.

According to the present invention, the contents of a temporary random access memory of a microprocessor can be read without intervention from the microprocessor.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the structure of an embodiment of an integrated circuit according to the present invention. In the figure, an integrated circuit 100 includes a microprocessor 10, an address selection circuit 20, a random access memory (hereinafter referred to as RAM) 30, a buffer circuit 40, and a data selection circuit 50. The integrated circuit 100 also has an address bus 200.
, a data bus 300, and a control terminal 400.

The operation of the integrated circuit 100 having the above configuration is as follows.

First, when the control terminal 400 is set to low level, the buffer 40 outputs the address data from the microprocessor 10 to the address bus 200, and the data selection circuit 50 outputs the address data from the microprocessor 10 to the data bus 300.
0, and the address selection circuit 20 connects the RAM address output from the microprocessor 10 to
The mode is set to supply to M30. microprocessor 1
0 outputs an address to the address bus 20O via the buffer circuit 40, and inputs the data on the data bus 300 internally via the data selection circuit 50, and starts execution as a micro-instruction. Here, when the microprocessor 10 uses the RAM 30, the microprocessor 10 uses the RAM 3 through the address selection circuit 20.
Output address data to 0 and write data to RAM
A read/write operation to 30 is executed.

Next, when the control terminal 400 is set to high level, the buffer circuit 40 is disabled, and the address selection circuit 20 inputs the address data from the address bus 200 to R.
The microprocessor 10 enters a mode in which data is supplied to the AM 30 and read data from the RAM 30 is output to the data bus 300 via the data selection circuit 50, and the microprocessor 10 is stopped.

Here, when address data on the RAM 30 is set to the address bus 200, data corresponding to this address data is read out from the RAM 30, and the data bus 300
It is output from

〔Effect of the invention〕

As described above, according to the present invention, the contents of the RAM used for temporary storage of the microprocessor inside the integrated circuit can be read without intervention from the microprocessor.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an integrated circuit according to the present invention. 10...Microprocessor, 20...
・Address selection circuit, 30...RAM. 40...Buffer circuit, 50...Data selection circuit, 100...Integrated circuit, 200...Address bus, 300...Data bus , 400... Control terminal.・Applicant NEC Corporation Representative Patent Attorney Umeo Yamauchi

Claims (1)

[Claims] A microprocessor that executes a microprogram, a random access memory that temporarily stores data used by the microprocessor, and a random access memory that is connected between the microprocessor and an external address bus and output from the microprocessor. A buffer circuit is connected between the microprocessor and an external data bus and inputs microinstructions input from the data bus to the microprocessor, or outputs data input from the data bus. and a data selection circuit connected between the microprocessor and the random access memory to randomly access address data specified by the microprocessor or input from an address bus. the microprocessor, the buffer circuit, the data selection circuit, and the address selection circuit are commonly connected by a control line, and the control line is connected to an external control terminal, and the control line is connected to an external control terminal. When a specific signal is input to the terminal, the operation of the microprocessor stops, the address selection circuit inputs the address data input from the address bus to the random access memory, and the data selection circuit inputs the address data input from the data bus. What is claimed is: 1. An integrated circuit that can be switched to a mode for inputting data into a random access memory.