JPS6342598A - Time division multiplex system speech path controller - Google Patents

Abstract

PURPOSE:To always perform the error inspection of all of the areas of a control memory without using the capacity of a speech path control system, by preparing two planes of control memories, writing the same data on both two planes, and comparing the contents of the control memories. CONSTITUTION:When the speech path control system 8 changes the path of a speech path, selectors 5 and 6 are set so that a time switch 1 is controlled from the control memory 3, and a changed data is written on the control memory 2. Furthermure, by switching the selectors 5 and 6 so that the time switch 1 is controlled from the control memory 2, the change of the path of the speech path is performed. Also, the selectors 5 and 6 remain unchanged as they are, and the same changed data is written on the control memory 3 similarly as the memory 2. Therefore, the same data are written on the control memories 2 and 3 except a time when the control memory is changed from the speech path control system 8, and the outputs of the control memories 2 and 3 are compared at a comparator 7, and if discrepancy is generated between them, the fact is informed to the speech path control system 8, with its address. The address recognized as an error at the comparator 7, is corrected by the speech path control system 8.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a time division multiplex communication path control device.

[Conventional technology]

Conventionally, the control memory of a time-division multiplex time switch has a one-sided structure, and is connected to the control system through an address bus and a data bus, and the control memory is rewritten by read and write commands from the control system. At that time, in order to check whether the information written to the control memory is correctly written to the control memory, the control system reads the same address as the one written once, and checks that it matches the value written from the control system. By checking this, it was determined that the control system was able to write correctly to the control memory.

[Problem that the invention seeks to solve]

The above-mentioned conventional time division multiplex communication path control device detects an error in the control memory by rereading it by the controlling system, thereby preventing a decline in the performance of other processing performed by the control system. In addition, it has the disadvantage that it is difficult to detect software errors caused by alpha rays that occur some time after writing.

[Means for solving problems]

The time division multiplex communication path control device of the present invention comprises a time switch, a first address generation circuit that outputs an address to the time switch, and a first address generation circuit that stores the same data and controls the time switch.
a second control memory; a first control memory; a second address generation circuit that outputs the same address to a second control memory; a selector that inputs the data read from the second control memory and outputs either one to the time switch; and a selector that compares the data read from the first control memory and the data read from the second control memory. A comparison circuit, 1st. It has a communication path control system that controls the second control memory and the selector and inputs a comparison result signal from the comparison circuit.

In this way, if the control memory is divided into two sides and the same data is written to the two sides of the control memory, it is highly unlikely that the data at the same address will be mistaken at the same time. It is possible to detect most errors by comparing the data at the same address and determining it as an error if they do not match.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an embodiment of a time division multiplexed communication path control device according to the present invention.

This embodiment includes a time switch 1, a control memory 2.3 that stores the same data and controls the time switch 1, and an address generator that outputs the same address to the control memory 2.3 and an address to the time switch 1. a circuit 4, a selector 5 which inputs data read from the control memories 2 and 3 and outputs either one to the time switch 1, and a control memory 2.
, 3, a selector 6 which inputs the data read from the selector 3 and outputs one of them, a comparison circuit 7 which compares the data output from the selector 5 and the data output from the selector 6, and the control memories 2 and 3. control, selectors 5 and 6,
It is comprised of a communication path control system 8 which controls one side to select data in the control memory 2 and the other to select data in the control memory 3, and inputs a comparison result signal from a comparison circuit 7.

In this embodiment, when the communication path control system 8 attempts to change the path of the communication path, the selector 5.6 is made to control the time switch 1 from the control memory 3. Then, the changed data is written into the control memory 2. Furthermore, selector 5
．． By switching the time switch 6 from the control memory 2 to control the time switch 1, the path of the communication path is changed. Further, the selectors 5 and 6 are left as they are, and change data similar to that in the control memory 2 is written in the control memory 3 as well. Therefore, the same data is written in the control memory 2.3 except when the control memory is changed from the 1-channel control system 8. Therefore, the outputs of the control memories 2 and 3 are compared by the comparison circuit 7, and if a mismatch occurs, the communication path control system 8 is notified along with the address thereof.

Addresses determined to be incorrect by the comparison circuit 7 can be corrected by the communication path control system 8, or can be subjected to operations such as cutting off the path.

In this embodiment, the sequential addresses to be supplied to the control memory 2.3 and the time switch l are generated by the common address generation circuit 4, but control memory errors may occur if these are supplied from separate address generation circuits. It can be easily inferred from the description of this embodiment that detection is also possible using a similar method. Alternatively, the output of the control memory 2.3 may be input directly to the comparison circuit 7 without providing the selector 6.

[Effects of the Invention] As explained above, the present invention has two control memories,
By writing the same data on both sides and comparing the contents of the control memory, it is possible to always check for errors in all areas within a 5% limit without using the ability of the channel control system. This has the advantage that the communication path control system requires less ability to use for error detection, and also has the effect that the communication path control system does not need to know the state of the communication path in order to perform error detection.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a time division multiplexed communication path control device of the present invention. l... Time switch, 2, 3... Control memory, 4... Address generation circuit, 5.6... Selector,
7... Comparison circuit, 8... Communication path control system. Figure 1

Claims (1)

[Claims] A time switch; a first address generation circuit that outputs an address to the time switch; a first address generation circuit that stores the same data and controls the time switch;
a second control memory; a second address generation circuit that outputs the same address to the first and second control memories; and a second address generation circuit that inputs data read from the first and second control memories; a selector that outputs the data to the time switch; a comparison circuit that compares the data read from the first control memory and the data read from the second control memory; and a comparison circuit that controls the first and second control memories and the selector. Also, a time division multiplexing type communication path control device having a communication path control system which inputs a comparison result signal from a comparison circuit.