JPS63307778A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a transistor having a uniform LDD structure and a semiconductor device, gate breakdown strength of which is prevented, by a method wherein an oxide film is formed onto one conductivity type semiconductor substrate, polycrystalline silicon is formed onto the oxide film, one part of the polycrystalline silicon is removed and a metallic silicide is formed onto the top face and side face of the polycrystalline silicon. CONSTITUTION:Oxide films 102, 103 are shaped onto one conductivity type semiconductor substrate 101, and polycrystalline silicon 104 is formed onto the oxide film 103. One part of polycrystalline silicon 104 is gotten rid of, and a metallic silicide 107 is shaped onto the top face and side face of polycrystalline silicon 104. Accordingly, a transistor having LDD structure is formed simply and uniformly, and gate breakdown strength is not lowered because etching by reactive ions is not required.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

Conventional semiconductor devices, especially 2DD (Lightlyaope)
In a method of manufacturing a semiconductor device having a d-drain structure, after forming a gate electrode, a low-concentration impurity is implanted into the semiconductor device, and a high-concentration impurity is implanted.

[Problems that the invention attempts to resolve]

However, in the conventional technology described above, in order to form an insulating film on the sidewalls of the gate electrode, a method was used in which the insulating film was formed on the entire surface and the entire surface was etched using R and E (reactive ion etching). It is difficult to form an insulating film, and this leads to variations in the characteristics of the ZDD structure transistor described above or to deterioration of gate breakdown voltage due to RIE.

The present invention is intended to solve these problems, and its purpose is to provide a method for manufacturing a transistor with a uniform LDD structure and a method for manufacturing a semiconductor device that prevents deterioration of gate breakdown voltage. .

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes a step of forming an oxide film on a dielectric type semiconductor substrate, a step of forming polycrystalline silicon on the oxide film, and a step of removing a part of the polycrystalline silicon. [Embodiment] An embodiment will be described in detail with reference to FIG. 1 below.

Step 1...FIG. 1(a) After forming the element isolation oxide film 102 on the P-type semiconductor substrate 101, the gate oxide film 103 is heated to 150~2
00″A is formed, and polycrystalline silicon is formed on it with a thickness of 2000~
Formed by 4000A chemical vapor deposition method, 800-100
After thermally diffusing phosphorus at 0'C, the polycrystalline silicon is etched using the resist pattern as a mask to form the gate electrode 104, and then ion implantation of low concentration phosphorus is performed.
A type low concentration diffusion layer 105 is formed.

Step 2...FIG. 1(b) Ti 106 is formed on the entire surface by sputtering at an angle of 100° to 300°.

Step 3...FIG. 1(C) By heat-treating for a short time of 800'030 seconds using a halogen lamp, the Ti106 becomes the gate electrode 10.
Only the periphery of 4 is silicided to form a Ti side 107. Thereafter, unreacted Ti is removed by treatment with a mixed solution of ammonia, hydrogen peroxide, and water.

Step 4...FIG. 1(d) Ion implantation of high concentration phosphorus or arsenic is performed to form an N-type high concentration diffusion layer 108.

Step 5...FIG. 1(e) Thermal annealing is performed to form the N-type low concentration diffusion layer 105 and
After activating the N-type high concentration diffusion layer 108, an oxide film 109 for interlayer insulation is formed by chemical vapor deposition at a thickness of 4000 to 6000A.
After etching the interlayer insulating oxide film 109 using the resist pattern as a mask to form a contact hole, AQllO for wiring material is formed.

〔Effect of the invention〕

As described above, according to the invention, L can be easily and uniformly
A transistor with a DD structure is formed, and furthermore, since etching by reactive ions is not required, there is an effect that the gate i pressure does not deteriorate.

[Brief explanation of drawings]

FIGS. 1(a) to 1(e) are main cross-sectional views showing the method for manufacturing a semiconductor device of the present invention. 101...P-type semiconductor substrate 102...Element isolation oxide film 103...Gate oxide film 104...Gate electrode 105...N-type low concentration diffusion layer 106...Ti 107...Ti Silicide 108... N-type high concentration diffusion layer 109... Arrangement film for interlayer insulation 110... AQ for wiring material Applicants: Seiko Epson Corporation, Patent Attorney Tsutomu Mogami and 1 other person 'j' Field

Claims (1)

[Claims] a step of forming an oxide film on a semiconductor substrate of one conductivity type, a step of forming polycrystalline silicon on the oxide film, a step of removing a part of the polycrystalline silicon, and a step of forming a metal silicon on the top and side surfaces of the polycrystalline silicon. 1. A method for manufacturing a semiconductor device, comprising a step of forming a compound.