JPS63290046A - パルス幅ひずみ補正回路 - Google Patents

パルス幅ひずみ補正回路

Info

Publication number
JPS63290046A
JPS63290046A JP62124420A JP12442087A JPS63290046A JP S63290046 A JPS63290046 A JP S63290046A JP 62124420 A JP62124420 A JP 62124420A JP 12442087 A JP12442087 A JP 12442087A JP S63290046 A JPS63290046 A JP S63290046A
Authority
JP
Japan
Prior art keywords
pulse width
signal
input
duty ratio
width control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62124420A
Other languages
English (en)
Japanese (ja)
Inventor
Yoshihiro Kawanabe
河那辺　善博
Kazunaga Ida
和長 井田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP62124420A priority Critical patent/JPS63290046A/ja
Priority to US07/192,984 priority patent/US4881041A/en
Priority to DE3816973A priority patent/DE3816973A1/de
Publication of JPS63290046A publication Critical patent/JPS63290046A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/017—Adjustment of width or dutycycle of pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/20—Repeater circuits; Relay circuits
    • H04L25/24—Relay circuits using discharge tubes or semiconductor devices
    • H04L25/242—Relay circuits using discharge tubes or semiconductor devices with retiming

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Pulse Circuits (AREA)
  • Dc Digital Transmission (AREA)
JP62124420A 1987-05-21 1987-05-21 パルス幅ひずみ補正回路 Pending JPS63290046A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62124420A JPS63290046A (ja) 1987-05-21 1987-05-21 パルス幅ひずみ補正回路
US07/192,984 US4881041A (en) 1987-05-21 1988-05-12 Pulse width distortion correction circuit
DE3816973A DE3816973A1 (de) 1987-05-21 1988-05-18 Impulsbreitenstoerkorrekturschaltung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62124420A JPS63290046A (ja) 1987-05-21 1987-05-21 パルス幅ひずみ補正回路

Publications (1)

Publication Number Publication Date
JPS63290046A true JPS63290046A (ja) 1988-11-28

Family

ID=14885038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62124420A Pending JPS63290046A (ja) 1987-05-21 1987-05-21 パルス幅ひずみ補正回路

Country Status (3)

Country Link
US (1) US4881041A (en, 2012)
JP (1) JPS63290046A (en, 2012)
DE (1) DE3816973A1 (en, 2012)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000059317A (ja) * 1998-08-04 2000-02-25 Mitsubishi Electric Corp 光送信器

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2628273B1 (fr) * 1988-03-02 1994-08-12 Saleeby Robert Transmetteur de trains d'impulsions
JP2650354B2 (ja) * 1988-09-08 1997-09-03 ヤマハ株式会社 Ｅｆｍ信号用波形整形回路
EP0375247B1 (en) * 1988-12-21 1996-02-28 Texas Instruments Incorporated Metastable tolerant latch
JPH07114349B2 (ja) * 1988-12-28 1995-12-06 株式会社東芝 デューティ制御回路装置
DE4018615A1 (de) * 1989-06-09 1990-12-13 Licentia Gmbh Schaltungsanordnung zur aufbereitung eines oszillatorsignals
JP3135253B2 (ja) * 1990-11-02 2001-02-13 キヤノン株式会社 信号処理装置
US5452333A (en) * 1992-06-19 1995-09-19 Advanced Micro Devices, Inc. Digital jitter correction method and signal preconditioner
WO1995022202A1 (en) * 1994-02-15 1995-08-17 Rambus, Inc. Amplifier with active duty cycle correction
US5455530A (en) * 1994-03-09 1995-10-03 Cray Computer Corporation Duty cycle control circuit and associated method
US5541759A (en) * 1995-05-09 1996-07-30 Microsym Computers, Inc. Single fiber transceiver and network
JPH11505987A (ja) * 1995-05-26 1999-05-25 ランバス・インコーポレーテッド 直交クロック発生器内で使用される移相器
US5990716A (en) * 1996-06-27 1999-11-23 Lsi Logic Corporation Method and system for recovering digital data from a transmitted balanced signal
AU5311498A (en) * 1996-12-23 1998-07-17 Dsc Communications A/S A method of detecting pulse-shaped data signals and a circuit for performing themethod
DE19737337A1 (de) * 1997-08-27 1999-03-04 Hirschmann Richard Gmbh Co Verfahren zur Kompensation von Bitdaueränderungen in faseroptischen Signalübertragungssystemen und Retimer zur Durchführung des Verfahrens
US6148048A (en) * 1997-09-26 2000-11-14 Cirrus Logic, Inc. Receive path implementation for an intermediate frequency transceiver
DE19823705A1 (de) * 1998-05-27 1999-12-02 Siemens Ag Verfahren und Schaltungsanordung zum Wiederherstellen eines Binärsignals
US6175248B1 (en) 1999-05-18 2001-01-16 Level One Communications, Inc. Pulse width distortion correction logic level converter
US6593789B2 (en) 2001-12-14 2003-07-15 International Business Machines Corporation Precise and programmable duty cycle generator
US6603339B2 (en) 2001-12-14 2003-08-05 International Business Machines Corporation Precision aligned multiple concurrent duty cycles from a programmable duty cycle generator
US6509771B1 (en) 2001-12-14 2003-01-21 International Business Machines Corporation Enhanced operational frequency for a precise and programmable duty cycle generator
US6577202B1 (en) 2001-12-14 2003-06-10 International Business Machines Corporation Multiple duty cycle tap points for a precise and programmable duty cycle generator
JP2004088679A (ja) * 2002-08-29 2004-03-18 Elpida Memory Inc デューティ比検知回路
US6833743B2 (en) 2002-10-29 2004-12-21 Gong Gu Adjustment of a clock duty cycle
FR2852465B1 (fr) * 2003-03-13 2005-04-29 Suisse Electronique Microtech Generateur d'horloge
JP4781744B2 (ja) * 2005-08-05 2011-09-28 ローム株式会社 電源装置及びこれを用いた電気機器
US9935763B2 (en) 2016-06-17 2018-04-03 Texas Instruments Incorporated Timing correction in a communication system

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3246247A (en) * 1963-11-18 1966-04-12 Gen Electric Pulse width to d. c. converter
GB1161112A (en) * 1965-06-14 1969-08-13 Hawker Siddeley Dynamics Ltd Improvements in or relating to Pulse-Width Modulators
US3452220A (en) * 1966-06-08 1969-06-24 Bell Telephone Labor Inc Pulse corrector circuit
CH603012A5 (en) * 1975-10-15 1978-08-15 Siemens Ag Albis Pulse train correction circuit
CA1048184A (en) * 1976-11-10 1979-02-06 Northern Telecom Limited Pulse duration correction circuit
US4527075A (en) * 1983-07-11 1985-07-02 Sperry Corporation Clock source with automatic duty cycle correction
DE3514155A1 (de) * 1985-04-19 1986-10-23 Dr. Johannes Heidenhain Gmbh, 8225 Traunreut Verfahren und einrichtung zur regelung des tastverhaeltnisses wenigstens eines elektrischen signals

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000059317A (ja) * 1998-08-04 2000-02-25 Mitsubishi Electric Corp 光送信器

Also Published As

Publication number Publication date
US4881041A (en) 1989-11-14
DE3816973A1 (de) 1988-12-22
DE3816973C2 (en, 2012) 1990-09-27

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