JPS6328465Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display circuit, and more particularly to an improvement in a display circuit for driving a bar graph display device.

A bar graph display device is a device in which display segments are arranged in parallel, and when the display segments are continuously displayed up to the position corresponding to the value of the input signal, it becomes a bar graph display. If only the pointer is displayed, a point display similar to a pointer display can be obtained. The display circuit for driving this bar graph display device includes a latch circuit that latches a display output output from a central processing unit that takes in an external input signal and performs calculations, and a segment decoder that takes in this latch output. Generally used is one in which each display segment of a bar graph display device is connected to each output end of each segment decoder.

However, in the display circuit having the above configuration, since display information is output from the central processing unit in parallel, a number of display output lines corresponding to the maximum number of display segments arranged in parallel are drawn out. As a result, many of the limited number of terminals in the IC-based central processing unit are used exclusively for display data output, and as the number of terminals dedicated to display data increases. The problem is that the functionality of the central processing unit is reduced.

Therefore, an object of the present invention is to provide a display circuit that has a simplified circuit configuration and a reduced number of display output lines for the central processing unit.

In order to achieve this purpose, the present invention has a display data output terminal that serially sends pulses for the number of display data to the central processing unit, and a clear signal output that sends a clear signal prior to the start of sending the next display data. The outputs of a shift register having display data as a clock input and a clear signal as a clear input are provided to each display segment of the bar graph display device. Hereinafter, a display circuit according to the present invention will be explained in detail using embodiments shown in the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a display circuit according to the present invention, which is particularly applied to detecting and displaying the rotational speed of a rotating body. In the figure, 1 is a waveform shaping circuit that shapes into a pulse the rotation detection signal A supplied from a pickup coil (not shown) that magnetically detects a protrusion provided on a part of a rotating body, for example. and is supplied to a central processing unit (hereinafter referred to as CPU) 2. The CPU 2 counts the signal interval of the rotation detection signal A supplied via the waveform shaping circuit 1 using a clock pulse or the like, and calculates the rotation speed by calculating the counted value. The rotational speed information calculated in this way is outputted as follows by using the output ports P ₁ and P ₂ of the CPU 2. First the output port
A clear signal B is sent from _P2 , and then a rotational speed signal C of serial pulses corresponding to the rotational speed value as display information is sent from the output port _P1 . 3a and 3b clock input the rotational speed signal C sent from output port _P1 of CPU2.
CK ₁ and CK ₂ , and the clear signal B output from the output port P ₂ is used as the clear inputs CL ₁ and CL ₂ , and the shift register 3a has a shift input IN ₁ constantly supplied with power +V. It is configured to sequentially shift the signal "1" every time the rotational speed signal C is supplied to the clock input terminal _CK1 ,
The shift register 3b sequentially shifts the rotational speed signal C each time it is supplied by using the output signal sent from the final stage output terminal _Q8 of the shift register 3a as a shift input _IN2 . Reference numeral 4 denotes a bar graph display device in which a large number of display segments (16 in this case) (not shown) are arranged in a straight line, and output signals are sent from output terminals Q ₁ to Q ₁₆ of shift registers 3a and 3b. is configured to be supplied to each display segment via input terminals IN ₁ to IN ₁₆ .

In the display circuit configured in this manner, when the rotating body (not shown) starts to rotate, a pick-up coil (not shown) provided close to the rotating body is activated by a protrusion provided on a part of the rotating body. A rotation detection signal A is generated every time passage is detected. The rotation detection signal A is shaped into a pulse in the waveform shaping circuit 1 and then supplied to the CPU 2.
The CPU 2 sequentially takes in the rotation detection signals A supplied through the waveform shaping circuit 1, and calculates the intervals of the rotation detection signals A by counting them using clock pulses or the like. Then, this rotation detection signal A
Since the interval is related to the rotational speed of the rotating body, the CPU 2 calculates the rotational speed by calculating this count value. The rotational speed signal C obtained in this way is output from the output port _P1 , but prior to sending out the rotational speed signal C, a clear pulse B shown in FIG. _2a is sent from the output port P2. Sent out. When the clear pulse B is generated, both the shift registers 3a and 3b are cleared, and each output terminal Q ₁ is cleared as shown in FIG.
All the outputs sent from ~ _Q16 become "L" and the bar graph display device 4 becomes blank. When clearing of the shift registers 3a and 3b is completed in this way, the output port _P1 of the CPU 2 is
A rotation speed signal C consisting of a serial pulse train of a number corresponding to the calculated rotation speed is generated as shown in _{FIG .} shift register 3
A and 3b sequentially shift up the "H" or "L" input signals supplied to the shift input terminals IN ₁ and IN ₂ every time the rotational speed signal C of the serial pulse train is supplied. In other words, the shift register 3a shifts the +V "H" signal supplied to the shift input terminal _IN1 to the first stage by the first pulse of the rotational speed signal C shown in FIG. An "H" signal is sent from _Q1 as shown in FIG. 2c. Next, when the second pulse of the rotational speed signal C is generated, the shift register 3a outputs the shift input terminal IN ₁
In order to take in the "H" signal supplied to Q2 and shift it up, the output of the output terminal _Q2 also becomes "H" as shown in FIG. 2d. In this way, each time each pulse of the rotational speed signal C represented by the serial pulse train is supplied, the "H" signal is sequentially shifted as shown in FIG. ₁ ～
“H” signal is output from _Q8 . On the other hand, the shift register 3b also sequentially takes in and shifts up the shift input supplied to the shift input terminal _IN2 every time each pulse of the rotational speed signal C is sent out. Since is the final stage output of the shift register 3a, the output signals sent from each output terminal _Q1 to _Q16 will continue to be in the "L" state at the time of clearing until the previous stage shift register 3a is full-up. Become. Then, when the eighth pulse of the rotational speed signal C is generated and the shift register 3a is fully shifted, the output terminal
The "H" signal sent from _Q8 is supplied to the shift input terminal _IN2 of the shift register 3b. Therefore, after the 9th pulse of the rotational speed signal C, the output terminals Q ₉ to Q of the shift register 3b are input in order to take in the "H" signal and shift sequentially every time a pulse is supplied to the shift register 3b. The signals output from _Q16 are sequentially inverted to "H" signals as shown in FIG. 2 k-m. Therefore, the bar graph display device 4 supplies the output signals sent from the output terminals Q ₁ to _{Q 16} of the shift registers 3a and 3b to each segment via the input terminals IN ₁ to IN ₁₆ , respectively.
performs a bar graph display by displaying each segment by emitting light in response to the shift of the "H" signal in the shift registers 3a and 3b. When the rotational speed signal C consisting of the 1st to 16th pulses is supplied as shown in FIG. displays full scale.

Therefore, in the circuit configured as described above, the outputs of the shift registers 3a and 3b are continuously and sequentially changed to the "H" signal up to the position corresponding to the number of serial pulses of the rotational speed signal C output from the CPU 2. Along with this, the bar graph display device 4 also displays the number of "H" signal shift outputs of the shift registers 3a and 3b, that is, the rotation speed signal C.
The rotational speed of the rotating body is displayed as a bar graph by sequentially and continuously displaying the number corresponding to the number of serial pulses composing the rotational body. In this case, the display on the bar graph display device 4 will increase sequentially in response to the shift-up operations of the shift registers 3a and 3b. , 3b within the operating range, bar graph display can be performed almost simultaneously.

Next, the CPU 2 updates the rotational speed signal C at a predetermined period, and at the time of updating, as in the case described above, after the clear signal B is generated, the rotational speed signal C is updated by the number of pulses in the serial pulse train. A rotational speed signal C is generated. Therefore, the bar graph display on the bar graph display device 4 is as follows.
Although it is constantly rewritten in accordance with the update cycle in the CPU 2, as described above, by accelerating the pulse cycle of the serial pulse that constitutes the rotational speed signal C, the shift registers 3a, 3
The operation of b is instantaneous, and as a result, flickering in the refresh display can be almost eliminated, and the display is displayed as if the rotational speed fluctuation of the rotating body were being changed at the update cycle of the rotational speed signal C. will be done. In the circuit configured in this way, shift registers 3a and 3b
By increasing the number of cascade connections and the number of parallel segments in the bar graph display device 4, the display range can be freely expanded. In other words, in this case, since the rotational speed signal C as the display information output from the output port _P1 of the CPU 2 is represented by the number of pulses of the serial pulse train, Therefore, the amount of display information can be increased freely, and only two output ports, output port P ₁ for display information transmission and output port P ₂ for clear signal transmission, are always used exclusively for display-related purposes. become.

Furthermore, since the shift register sequentially takes in and shifts shift input signals at the active level, each output terminal of this shift register generates a parallel output that is latched for approximately one update period. That will happen. As a result, the output of the shift register can be directly supplied to the bar graph display device, which eliminates the need to provide a latch circuit between the shift register and the bar graph display device, simplifying the circuit. It will be possible to achieve this.

In the above embodiment, the rotational speed of the rotating body is displayed as a bar graph, but the present invention is not limited to this, and can be applied to displaying bar graphs for all types of information. Needless to say, it is possible.

As explained above, the display circuit according to the present invention generates a clear signal from the first output port of the central processing unit every predetermined update period to clear the shift register, and following this clear signal, The shift register that receives the "H" signal as a shift input is shifted up by each pulse of display information represented by the number of pulses of the serial pulse train sent out from the second output port of the device, and the shifted up shift register is The output drives each display segment of the bar graph display device. Therefore, there are two output ports of the central processing unit exclusively used for display: an output port for outputting display information represented by the number of pulses in a serial pulse train, and an output port for outputting a clear signal.
As a result, the number of output ports of the central processing unit exclusively used for the display is significantly reduced, and along with this, the functions of the central processing unit can be greatly improved by effectively utilizing the limited output ports. I can do it.
Furthermore, since the shift register sequentially takes in and shifts shift input signals at the active level, each output terminal of this shift register generates a parallel output that is latched for approximately one update period. That will happen. As a result, the output of the shift register can be directly supplied to the bar graph display device, which eliminates the need to provide a latch circuit between the shift register and the bar graph display device, simplifying the circuit. It has various excellent effects such as the ability to achieve

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a display circuit according to the present invention, and FIGS. 2a to 2m are operation waveform diagrams of various parts of the circuit shown in FIG. 1. 1... Waveform shaping circuit, 2... Central processing unit (CPU), 3a, 3b... Shift register, 4...
...Bar graph display device.

Claims (1)

[Claims for Utility Model Registration] (1) Display information represented by the number of pulses of a serial pulse train is output from the first output port in accordance with a predetermined update cycle, and the display information is sent out. a central processing unit that sends out a clear signal from a second output port just before the display information is reset; and a central processing unit that is reset by the clear signal and sequentially takes in active level shift inputs by each pulse of the serial pulse train that constitutes the display information. What is claimed is: 1. A display device comprising: a shift register section that performs shifting; and a bar graph display device in which a plurality of display segments each driven by each output of the shift register section are arranged in parallel. (2) The shift register section includes a first-stage shift register that receives predetermined fixed information as a shift input;
The utility model according to claim 1, characterized in that it is constituted by shift registers connected in cascade so as to respectively shift and input the final stage outputs of the respective preceding stage shift registers including the first stage shift register. display circuit.