JPS5834183U - display circuit - Google Patents

display circuit

Info

Publication number
JPS5834183U
JPS5834183U JP12905781U JP12905781U JPS5834183U JP S5834183 U JPS5834183 U JP S5834183U JP 12905781 U JP12905781 U JP 12905781U JP 12905781 U JP12905781 U JP 12905781U JP S5834183 U JPS5834183 U JP S5834183U
Authority
JP
Japan
Prior art keywords
shift register
display
shift
register
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12905781U
Other languages
Japanese (ja)
Other versions
JPS6328465Y2 (en
Inventor
太田　和裕
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP12905781U priority Critical patent/JPS5834183U/en
Publication of JPS5834183U publication Critical patent/JPS5834183U/en
Application granted granted Critical
Publication of JPS6328465Y2 publication Critical patent/JPS6328465Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案による表示回路の一実施例を示す回路図
、第２図ａ〜ｍは第１図に示す回路の各部動作波形図で
ある。 １・・・・・・波形整形回路、２・・・・・・中央演算
装置（ＣＰＵ）、３　ａ、　　３　ｂ・・・・・・シフ
トレジスタ、４・・・・・・バーグラフ表示装置。FIG. 1 is a circuit diagram showing an embodiment of a display circuit according to the present invention, and FIGS. 2a to 2m are operation waveform diagrams of various parts of the circuit shown in FIG. 1. 1... Waveform shaping circuit, 2... Central processing unit (CPU), 3 a, 3 b... Shift register, 4... Bar graph display device .

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] （１）第１出力ポートからシリアルパルス列のパルス数
によって表わされる表示情報を予め定められた更新周期
に対応して出力するとともに前記表示情報の送出される
直前に第２出力ポートからクリア信号を送出する中央演
算装置と、前記クリア信号によってリセットされるとと
もに前記表示情報を構成するシリアルパルス列の各パル
スによってアクティブレベルのシフト入力を順次取り込
んでシフトするシフトレジスタ部と、前記シフトレジス
タ部の各出力によってそれぞれ駆動される表示セグメン
トが複数個並設されたバーグラフ表示装置とを備えた表
示回路。(1) Output display information represented by the number of pulses of a serial pulse train from the first output port in accordance with a predetermined update cycle, and send a clear signal from the second output port immediately before the display information is sent out. a central processing unit that is reset by the clear signal and that sequentially takes in and shifts shift inputs of active level by each pulse of the serial pulse train that constitutes the display information; A display circuit including a bar graph display device in which a plurality of display segments each driven are arranged in parallel. （２）　　前記シフトレジスタ部は予め定められた固定
情報をシフト入力とする初段シフトレジスタと、前記初
段シフトレジスタを含む各前段シフトレジスタの最終段
出力をそれぞれシフト入力するように縦続接続されたシ
フトレジスタとによって構成された実用新案登録請求の
範囲第１項記載の表示回路。(2) The shift register section includes a first stage shift register which receives predetermined fixed information as a shift input, and a shift register connected in cascade so as to shift and input the final stage output of each previous stage shift register including the first stage shift register. 2. A display circuit according to claim 1, which comprises a register and a register.
JP12905781U 1981-08-31 1981-08-31 display circuit Granted JPS5834183U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12905781U JPS5834183U (en) 1981-08-31 1981-08-31 display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12905781U JPS5834183U (en) 1981-08-31 1981-08-31 display circuit

Publications (2)

Publication Number Publication Date
JPS5834183U true JPS5834183U (en) 1983-03-05
JPS6328465Y2 JPS6328465Y2 (en) 1988-08-01

Family

ID=29922735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12905781U Granted JPS5834183U (en) 1981-08-31 1981-08-31 display circuit

Country Status (1)

Country Link
JP (1) JPS5834183U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476630U (en) * 1977-11-10 1979-05-31
JPS5517436A (en) * 1978-07-24 1980-02-06 Seiko Epson Corp Bar graph drive circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476630U (en) * 1977-11-10 1979-05-31
JPS5517436A (en) * 1978-07-24 1980-02-06 Seiko Epson Corp Bar graph drive circuit

Also Published As

Publication number Publication date
JPS6328465Y2 (en) 1988-08-01

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