JPS6327856B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a semiconductor device.

Conventionally, as a container for a semiconductor device, for example, an element bonding part (hereinafter referred to as a chip) for mounting a semiconductor element (hereinafter referred to as a chip) in the center of the upper surface of a ceramic substrate is used.
A wiring metal film (hereinafter referred to as an internal lead) for connecting fine metal wires is provided around the mount part (hereinafter referred to as an internal lead).
Further, a ceramic sealing frame is fixed to the upper surface of the ceramic substrate on the outside thereof, and a cover plate made of an insulating material such as glass or ceramic is fixed on the sealing frame with resin, metal brazing material, or glass adhesive. A structure is known in which the ceramic substrate is fixedly sealed with an adhesive such as the above, and external leads electrically connected to the internal leads are brazed to the side surface of the ceramic substrate.

On the other hand, the size of chips tends to increase due to the remarkable development of manufacturing technology and the increase in chip functions. For example, in the case of a semiconductor device container using a ceramic substrate, Au-Su, Au-Si are used to fix the chip to the mounting part.
Si, which is the substrate of the chip, is
A common method is to use an alloying reaction with

A method of fixing using a resin material is also well known. No matter which fixing method is adopted, the alignment of the two in the work of fixing the chip to the mount section will determine the efficiency of the subsequent wire bonding work.

In other words, if the bonding pads of the chip to be electrically connected and the internal leads of the semiconductor device container are in positions where bonding is easy, the bonding work will be easy, but if these positions shift, the bonding work will be difficult. Not only is this difficult, but it also causes defects such as electrical short circuits between adjacent wires. It is clear that the above-mentioned tendency is exacerbated when large or elongated chips are mounted.

Furthermore, in semiconductor devices such as image sensors, it is necessary to precisely align the light-receiving window of the container with the chip, and in this case, it is extremely difficult to align the elongated chip with high precision.

An object of the present invention is to provide a semiconductor device that eliminates the above-mentioned drawbacks.

In the present invention, a metallized layer is applied to the mounting surface of a ceramic substrate except for that part so as to serve as an alignment mark, and the thus provided part without the metallized layer is used as an alignment mark.
The chip is mounted so that this is in line with the alignment pattern on the semiconductor chip. Furthermore, the chip has an elongated rectangular shape, and along its long sides, a ceramic plate is provided on the mounting surface with internal leads for bonding connection.

Embodiments of the present invention will be described below with reference to the drawings.
FIGS. 1a and 1b are a plan view and a cross-sectional view of a semiconductor device container improved to be suitable for the present invention.

A ceramic substrate 101 has an element adhesive part 103 in the center for mounting a semiconductor element 102 thereon, and a wiring metal film 10 for connecting fine metal wires around the element adhesive part 103.
4 is metallized, and a ceramic sealing frame 105 is fixed to the upper surface of the ceramic substrate 101 on the outside thereof, and a substrate 106 made of an insulating material such as glass or ceramic is placed on the sealing frame with a resin, a metal brazing material, or a glass material. The ceramic substrate 1 is fixed and sealed with an adhesive 107 such as an adhesive.
An external lead 108 electrically connected to the wiring metal film is brazed to the outside of the wiring metal film.

Here, the wiring metal film (internal lead) 104 for connecting thin metal wires is spaced from side to side and provided on the long sides of the chip so that an alignment mark can be placed in the center.

FIGS. 2a and 2b are a plan view and a sectional view of a semiconductor device container according to an embodiment of the present invention.

Two alignment patterns 209 are provided on a part of the surface of the element bonding portion 203. As a method for forming this alignment pattern, W, Mo--
When metalizing Mn, etc., a metallization mask plate is made in advance so that the alignment pattern part is not metalized, and by printing, the alignment pattern part is not metalized and is therefore distinguishable from other parts. can. By using the metalized portion as the alignment mark, the alignment mark can be attached in the same process as the conventional one without inserting any other special process. Moreover, this mark part has a strong optical contrast with the surrounding metallized layer, so it is very suitable for optical identification. Furthermore, by aligning the marks on the mounting surface and the alignment pattern on the chip,
The chip position to be mounted can be set accurately and quickly by optical scanning in one direction, and the automation of assembly can be further promoted.

When a semiconductor device container with such a structure is used to mount a large or slender chip, the mounting position may become inaccurate, bonding becomes difficult, and the product may be defective due to misalignment of the chip. It is possible to prevent such defects. In other words, by providing a combination pattern on the chip,
By aligning and fixing the combination pattern to the positioning pattern provided on the mount, it is possible to accurately mount the chip. Furthermore, in the case of automating the mounting work, it goes without saying that the alignment pattern can be used as is for position identification.

As for the shape of the alignment pattern, it goes without saying that it may be not only triangular, but also round, concave, or convex, as shown in FIG. 2a.

As described above in detail, the present invention provides a container for a semiconductor device and a semiconductor device that can prevent inaccurate mounting positions when mounting a large or long and narrow semiconductor element.

[Brief explanation of the drawing]

FIGS. 1a and 1b are a plan view and a sectional view of a semiconductor device container to which the present invention is applied, and FIGS. 2a and 1b are
FIG. 2b is a plan view and a sectional view of an embodiment of the present invention. In addition, in the figure, 101, 101', 201, 20
1'... Ceramic substrate, 102, 102', 20
2,202'...Semiconductor element, (chip), 103,
103', 203, 203'...Element adhesion part (mount part), 104, 104', 204, 204'...
...Wiring metal film for thin metal wire connection (internal lead), 1
05, 105', 205, 205'...Lid plate, 10
7,107',207,207'...adhesive, 10
8, 108', 208, 208'...external lead,
209... Alignment pattern, 210... Alignment pattern.

Claims (1)

[Claims] 1. A ceramic substrate to which a long and thin rectangular element chip is fixed, and a position opposite to the mounting surface of the ceramic substrate with the long side of the element chip in between, is removed so that only that part exists as an alignment mark. a metallized layer formed on the entire surface; an element chip fixed on the metallized layer using a brazing material and having an alignment pattern only in the center of the long side corresponding to the mark portion;
A plurality of ceramic plates, each having a plurality of internal leads, are fixed to the metallized layer so as to be located on the left and right sides of the concave alignment mark along the two long sides of the element chip; It has a plurality of metal wirings interconnecting each of the marks and electrodes on the element chip, and has two mark parts that are not metallized and are provided only in the center of the mounting surface and on the element chip. 2
The element chip is brazed so that the two alignment patterns are aligned in a straight line in the horizontal direction, and each of the internal leads and opposing electrodes on the element chip are connected by bonding using a plurality of metal wirings. Characteristic semiconductor devices.