JPS63184997A - 半導体メモリ - Google Patents

半導体メモリ

Info

Publication number
JPS63184997A
JPS63184997A JP62261920A JP26192087A JPS63184997A JP S63184997 A JPS63184997 A JP S63184997A JP 62261920 A JP62261920 A JP 62261920A JP 26192087 A JP26192087 A JP 26192087A JP S63184997 A JPS63184997 A JP S63184997A
Authority
JP
Japan
Prior art keywords
emitter
cell
ecl
node
word line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62261920A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0524593B2 (cg-RX-API-DMAC7.html
Inventor
シングーテイ・ケント・チヤング
エドワード・ハツクバース
デニイ・テユアンーリイ・タング
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS63184997A publication Critical patent/JPS63184997A/ja
Publication of JPH0524593B2 publication Critical patent/JPH0524593B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP62261920A 1987-01-15 1987-10-19 半導体メモリ Granted JPS63184997A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US003525 1987-01-15
US07/003,525 US4864539A (en) 1987-01-15 1987-01-15 Radiation hardened bipolar static RAM cell

Publications (2)

Publication Number Publication Date
JPS63184997A true JPS63184997A (ja) 1988-07-30
JPH0524593B2 JPH0524593B2 (cg-RX-API-DMAC7.html) 1993-04-08

Family

ID=21706276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62261920A Granted JPS63184997A (ja) 1987-01-15 1987-10-19 半導体メモリ

Country Status (4)

Country Link
US (1) US4864539A (cg-RX-API-DMAC7.html)
EP (1) EP0284665B1 (cg-RX-API-DMAC7.html)
JP (1) JPS63184997A (cg-RX-API-DMAC7.html)
DE (1) DE3773663D1 (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05505696A (ja) * 1990-04-06 1993-08-19 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 能動書込み負荷を有するメモリ・セル

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4995053A (en) * 1987-02-11 1991-02-19 Hillier Technologies Limited Partnership Remote control system, components and methods
US5043939A (en) * 1989-06-15 1991-08-27 Bipolar Integrated Technology, Inc. Soft error immune memory
JP3266177B2 (ja) * 1996-09-04 2002-03-18 住友電気工業株式会社 電流ミラー回路とそれを用いた基準電圧発生回路及び発光素子駆動回路
US7078306B1 (en) 2003-03-24 2006-07-18 Integrated Device Technology, Inc. Method for forming a thin film resistor structure
US7336102B2 (en) * 2004-07-27 2008-02-26 International Business Machines Corporation Error correcting logic system
US7642813B2 (en) * 2004-07-27 2010-01-05 International Business Machines Corporation Error correcting logic system
US7921400B1 (en) 2005-07-20 2011-04-05 Integrated Device Technology, Inc. Method for forming integrated circuit device using cell library with soft error resistant logic cells
US7397692B1 (en) * 2006-12-19 2008-07-08 International Business Machines Corporation High performance single event upset hardened SRAM cell
JP7762882B2 (ja) 2020-12-23 2025-10-31 パナソニックＩｐマネジメント株式会社 モータ制御装置、モータ制御方法、および、プログラム

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2737173C2 (de) * 1977-08-18 1979-10-18 Motoren- Und Turbinen-Union Muenchen Gmbh, 8000 Muenchen Verfahren zur Kapselung eines Formkörpers aus Keramik
FR2413782A1 (fr) * 1977-12-30 1979-07-27 Radiotechnique Compelec Element de circuit integre destine aux memoires bipolaires a isolement lateral par oxyde
NL188721C (nl) * 1978-12-22 1992-09-01 Philips Nv Halfgeleidergeheugenschakeling voor een statisch geheugen.
JPS5588356A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
JPS55146680A (en) * 1979-04-26 1980-11-15 Fujitsu Ltd Decoding circuit
JPS564263A (en) * 1979-06-25 1981-01-17 Hitachi Ltd Semiconductor memory
JPS5841596B2 (ja) * 1980-11-28 1983-09-13 富士通株式会社 スタティック型半導体記憶装置
JPS6028076B2 (ja) * 1980-12-25 1985-07-02 富士通株式会社 半導体メモリの書込み回路
JPS6047666B2 (ja) * 1981-01-29 1985-10-23 富士通株式会社 半導体記憶装置の書込み方式
FR2522432A1 (fr) * 1982-02-26 1983-09-02 Radiotechnique Compelec Procede pour obtenir la decharge rapide d'une rangee de matrice memoire, et circuit de decharge dynamique correspondant
DE3380543D1 (en) * 1982-07-02 1989-10-12 Fujitsu Ltd Semiconductor memory devices with word line discharging circuits
DE3227121A1 (de) * 1982-07-20 1984-01-26 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum lesen bipolarer speicherzellen
JPS5956287A (ja) * 1982-09-27 1984-03-31 Fujitsu Ltd 半導体メモリ回路
JPS59151386A (ja) * 1983-01-31 1984-08-29 Fujitsu Ltd 半導体記憶装置
JPS6089895A (ja) * 1983-10-24 1985-05-20 Matsushita Electric Ind Co Ltd 半導体記憶装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05505696A (ja) * 1990-04-06 1993-08-19 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 能動書込み負荷を有するメモリ・セル

Also Published As

Publication number Publication date
EP0284665A1 (en) 1988-10-05
US4864539A (en) 1989-09-05
EP0284665B1 (en) 1991-10-09
JPH0524593B2 (cg-RX-API-DMAC7.html) 1993-04-08
DE3773663D1 (de) 1991-11-14

Similar Documents

Publication Publication Date Title
JP2915011B2 (ja) 単発性乱調の防護のための容量性を有したメモリ・セル
JP2589949B2 (ja) 記憶セル
US4782467A (en) Radiation hard gated feedback memory cell
US4797804A (en) High density, high performance, single event upset immune data storage cell
EP0222472B1 (en) Complementary semiconductor device with a substrate bias voltage generator
US20090141538A1 (en) Voltage Controlled Static Random Access Memory
CN1187011A (zh) 具有单个位线的四器件静态随机访问存储器单元
JPS63184997A (ja) 半導体メモリ
KR101958405B1 (ko) 메모리 셀 및 이의 동작 방법
US5640341A (en) Memory cell insensitive to collisions of heavy ions
CN113140244B (zh) 静态随机存取存储器器件及其形成方法
US6888741B2 (en) Secure and static 4T SRAM cells in EDRAM technology
US4995000A (en) Static RAM cell with high speed and stability
JPH07141883A (ja) スタティックｒａｍ
US5043939A (en) Soft error immune memory
CN111710355B (zh) 提升sram芯片写能力的差分电源电路
EP0461429A1 (en) Self-locking load structure for staticram
CN115148255A (zh) 抗单粒子翻转的sram单元加固电路
US4635228A (en) Random access memory employing unclamped complementary transistor switch (CTS) memory cells and utilizing word to drain line diode shunts
JPH09320276A (ja) センスアンプ回路
Tang et al. A circuit concept for reducing soft error in high-speed memory cells
US5020027A (en) Memory cell with active write load
Gill et al. A Modified 8-Transistor SRAM Cell Design with High Stability and Low Power Applications
CN115719609A (zh) 抗软错误的sram
CN118737227A (zh) 存储单元及其控制方法、存储器