JPS63181378A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To assure a shallow bonding accompanied by no damage due to ion implantation by a method wherein, after forming a gate electrode on a substrate through the intermediary of a gate insulating film, a semiconductor layer is formed on both sidewall parts of the gate electrode through the intermediary of another insulating film and then the overall surface is implanted with ion. CONSTITUTION:Oxide film isolating parts 2 are formed on a p-type silicon substrate 1 while a gate film 3 and a gate electrode 4 are successively formed. First, an oxide film 10 is deposited to be left only on the gate sidewall parts by RIE anisotropical etching process. Second, a polycrystalline silicon film 11 is deposited and RIE isotropically etched to be left on the gate sidewall parts and then removed excluding source.drain regions using a photoresist 12. Third, after removing the photoresist 12. As is ion-implanted to form source.drain regions 5a, 5b and then As of polycrystalline silicon 11 is diffused in a P type substrate 1 to form thinly bonded source.drain regions 5a, 5b. Finally, an insulating film 6 is formed to make contact holes in the specified positions forming Al wirings 7.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing an insulated gate (MIS) field effect semiconductor device with a shallow junction structure. be.

[Conventional technology]

FIGS. 2(21) to 2C) are cross-sectional views showing the main stages of a conventional method for manufacturing a semiconductor device of this type.

First, as shown in FIG. 2(a), an oxide film isolation 2 is formed on a p-type silicon substrate 1, and then a gate insulating film 3 and a gate electrode 4 are sequentially formed. Next, as shown in FIG. 2(b), using this gate electrode 4 as a mask, an n-type impurity (1) is implanted at a low acceleration voltage to realize a shallow junction. form. Thereafter, heat treatment is performed to form an insulating film 6, contact holes are opened at predetermined locations, and A1 wiring 7 is formed to complete the device.

[Problem that the invention seeks to solve]

In conventional semiconductor devices, ions are directly implanted into the semiconductor substrate 1, which makes it difficult to make the source/drain junction shallow, and also requires a process to recover from damage caused by ion implantation. was there.

The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a method for manufacturing a semiconductor device that can eliminate damage caused by ion implantation and obtain a shallow junction.

[Means for solving problems]

The method for manufacturing a semiconductor device according to the present invention includes forming a gate electrode on a substrate via a gate insulating film, forming a semiconductor layer on both side walls of the gate electrode via an insulating film, and then implanting ions over the entire surface. The source and drain are then formed.

[Effect]

In this invention, a semiconductor layer is formed via an insulating film in the region that should become the source/drain near the gate electrode,
Since ions are then implanted, this semiconductor layer serves as an ion implantation stopper and can prevent damage caused by ion implantation.

〔Example〕 An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1H are diagrams for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention.

In the figure, the same symbols as in FIG. 2 indicate the same parts, 6 is an insulating film, 7 is an Afi wiring, 10 is an insulating film formed on both side walls of the gate electrode, 11 is a polycrystalline silicon film, and 12 is a photoresist. It is.

Next, the manufacturing method will be explained.

As shown in FIG. 1(a), after forming an oxide film isolation 2 on a p-type silicon substrate 1, a gate oxide film 3 and a gate electrode 4 made of polycrystalline silicon are sequentially formed.
For example, 500 people deposit an oxide film 10 by VD, and then
As shown in Figure (b), an oxide film 1 is formed only on the gate sidewalls by RIE anisotropic etching.
Leave 0.

Next, as shown in FIG. 1C, for example, 3000 polycrystalline silicon films 11 are deposited by LPGVD, and R photoresist 12 is used to cover the regions on the substrate that are to become sources and drains. - Polycrystalline silicon 11 outside the source/drain region to prevent short-circuit between drains.
Remove by etching. and photoresist 12
After removing the n-type impurity (If), the source and drain regions 5a and 5b are formed by implanting 4×10"/d ions of, for example, As at 50 keV. Further, heat treatment is performed to form the polycrystalline silicon 11. As is diffused into the p-type substrate 1 to form shallow junction source and drain regions 5a,
5b (111!1(47,L't)).

Thereafter, an insulating film 6 is formed, contact holes are opened at predetermined locations, and AN interconnections 7 are formed to complete the device (@
Htfl(l+7).

As described above, according to this embodiment, the semiconductor layer 11 is formed on both side walls of the gate electrode 4 via the insulating film 10, and then ions are implanted over the entire surface.
serves as an ion stopper, preventing damage caused by ion implantation. Also, through heat treatment, the semiconductor layer 11-containing impurities become a diffusion source for impurities, which diffuse into the semiconductor substrate, making it possible to form shallow junctions with high surface concentration. MISFET can be obtained.

In the above embodiment, LPGVD,! : Using RIE, polycrystalline silicon 11 is deposited on both side walls of the gate via an insulating film.
An ion implantation stopper and a diffusion source were formed,
For example, a high melting point metal such as tungsten or a semiconductor such as polycrystalline silicon may be selectively formed in the source/drain formation region near the gate via an insulating film using a selective photochemical CVD device. In this case, the process can be shortened.

Furthermore, in the above embodiment, the n-channel insulated gate (MIS)
) Field effect semiconductor devices have been described, but of course this can be achieved by replacing the p-type substrate with an n-type substrate and making the implanted n-type impurity ions p-type.
s) A field effect semiconductor device may be formed.

〔Effect of the invention〕

As described above, according to the method for manufacturing a semiconductor device according to the present invention, after forming a gate electrode on a substrate with a gate insulating film interposed therebetween, a semiconductor layer is formed on both side walls of the gate electrode with an insulating film interposed therebetween. Since the semiconductor layer functions as an ion implantation stopper and an impurity diffusion source, it is possible to reduce ion implantation damage 6 and to form a shallow junction MI 5F.
ET can be formed, which has the effect of successfully obtaining a fine MISFET.

[Brief explanation of the drawing]

FIG. 1 (al to (hl) are diagrams showing the manufacturing method of a semiconductor device according to an embodiment of the present invention in the order of steps, and FIG. 2 is a diagram showing the conventional M
It is a figure for explaining the manufacturing method of OSFET. In the figure, 1 is a p-type silicon substrate, 2 is a field oxide film, 3 is a gate insulating film, 4 is a gate electrode, 5a, 5b
are source/drain regions, 6 is an insulating film, 7 is an Al wiring,
10 is an insulating film, 11 is polycrystalline silicon, and 12 is a photoresist.

Claims (1)

[Claims] (1) In a method of manufacturing an insulated gate field effect semiconductor device, a first step of forming a gate electrode having a gate insulating film on a semiconductor substrate of a first conductivity type; A semiconductor device comprising: a second step of forming a semiconductor layer via an insulating film; and a third step of ion-implanting second conductivity type impurities into the entire surface to form source/drain regions. manufacturing method.