JPS63174456U - - Google Patents

Info

Publication number
JPS63174456U
JPS63174456U JP1986196178U JP19617886U JPS63174456U JP S63174456 U JPS63174456 U JP S63174456U JP 1986196178 U JP1986196178 U JP 1986196178U JP 19617886 U JP19617886 U JP 19617886U JP S63174456 U JPS63174456 U JP S63174456U
Authority
JP
Japan
Prior art keywords
lead terminal
insulating substrate
circuit element
hybrid integrated
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986196178U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986196178U priority Critical patent/JPS63174456U/ja
Publication of JPS63174456U publication Critical patent/JPS63174456U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例による混成集積回路
の主要構成を示す模式側断面図、第２図は第１図
に示す放熱板の斜視図、第３図は第１図の混成集
積回路を回路基板に搭載した側面図、第４図は回
路基板に搭載した従来の混成集積回路の主要構成
を示す模式側断面図、である。 図中において、１，２１はプリント配線板（回
路基板）、５は絶縁基板、６は搭載回路素子、７
はリード端子、８は樹脂外装、９は半田、１２は
放熱板、１３は熱伝導性接着剤、を示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. 上面に回路素子を形成および搭載し所定の端部
    にリード端子７の一端を接続した絶縁基板５の下
    面に熱伝導性接着剤１３で接着した放熱板１２が
    、少なくとも該回路素子および該リード端子７と
    該絶縁基板５との接続部を覆うようにトランスフ
    アモールドで形成した樹脂外装８より外側に突出
    する突出部を、該リード端子７の接続回路を形成
    した回路基板２１の上面とほぼ同一面となるよう
    に折り曲げしてなることを特徴とする混成集積回
    路。
JP1986196178U 1986-12-19 1986-12-19 Pending JPS63174456U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986196178U JPS63174456U (ja) 1986-12-19 1986-12-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986196178U JPS63174456U (ja) 1986-12-19 1986-12-19

Publications (1)

Publication Number Publication Date
JPS63174456U true JPS63174456U (ja) 1988-11-11

Family

ID=31154759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986196178U Pending JPS63174456U (ja) 1986-12-19 1986-12-19

Country Status (1)

Country Link
JP (1) JPS63174456U (ja)

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