JPS63170945U - - Google Patents
Info
- Publication number
- JPS63170945U JPS63170945U JP6267587U JP6267587U JPS63170945U JP S63170945 U JPS63170945 U JP S63170945U JP 6267587 U JP6267587 U JP 6267587U JP 6267587 U JP6267587 U JP 6267587U JP S63170945 U JPS63170945 U JP S63170945U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor pellet
- die pad
- semiconductor
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000008188 pellet Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 238000007789 sealing Methods 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002335 surface treatment layer Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Wire Bonding (AREA)
Description
第1図は従来の技術によるリードフレームの斜
視図、第2図は従来の半導体装図の断面図、第3
図は本考案の半導体装置の断面図、第4図は本考
案で用いられるダイパツドテープの構造例を示す
断面図、第5図は本考案を構成するリードフレー
ムの1例の平面図である。 2:リード、4:半導体ペレツト、5:ダイボ
ンデイング接着剤、6……ボンデイングワイヤー
、7:電極、8:封止樹脂、9:空隙部、10:
ダイパツドテープ、10a:接着性支持体、10
b:支持体、11a,11b:接着層、12a:
表面処理層。
視図、第2図は従来の半導体装図の断面図、第3
図は本考案の半導体装置の断面図、第4図は本考
案で用いられるダイパツドテープの構造例を示す
断面図、第5図は本考案を構成するリードフレー
ムの1例の平面図である。 2:リード、4:半導体ペレツト、5:ダイボ
ンデイング接着剤、6……ボンデイングワイヤー
、7:電極、8:封止樹脂、9:空隙部、10:
ダイパツドテープ、10a:接着性支持体、10
b:支持体、11a,11b:接着層、12a:
表面処理層。
Claims (1)
- ダイパツドが排除されたリードフレームの空隙
部に半導体ペレツトが配置され、該半導体ペレツ
トの下面とリードの下面とが、ダイパツドテープ
に接着され、かつ該半導体ペレツト上部に設けた
電極とリード間がボンデイングワイヤーで接続さ
れ、これらが封止樹脂で密封封止されていること
を特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6267587U JPS63170945U (ja) | 1987-04-27 | 1987-04-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6267587U JPS63170945U (ja) | 1987-04-27 | 1987-04-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63170945U true JPS63170945U (ja) | 1988-11-07 |
Family
ID=30897172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6267587U Pending JPS63170945U (ja) | 1987-04-27 | 1987-04-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63170945U (ja) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5226878B1 (ja) * | 1972-07-03 | 1977-07-16 | ||
JPS57160138A (en) * | 1981-03-27 | 1982-10-02 | Yamagata Nippon Denki Kk | Lead frame for semiconductor device |
JPS5834934A (ja) * | 1981-08-26 | 1983-03-01 | Toshiba Corp | 半導体装置 |
JPS60113932A (ja) * | 1983-11-26 | 1985-06-20 | Mitsubishi Electric Corp | 樹脂封止半導体装置の組立方法 |
-
1987
- 1987-04-27 JP JP6267587U patent/JPS63170945U/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5226878B1 (ja) * | 1972-07-03 | 1977-07-16 | ||
JPS57160138A (en) * | 1981-03-27 | 1982-10-02 | Yamagata Nippon Denki Kk | Lead frame for semiconductor device |
JPS5834934A (ja) * | 1981-08-26 | 1983-03-01 | Toshiba Corp | 半導体装置 |
JPS60113932A (ja) * | 1983-11-26 | 1985-06-20 | Mitsubishi Electric Corp | 樹脂封止半導体装置の組立方法 |