JPS63159873U - - Google Patents
Info
- Publication number
- JPS63159873U JPS63159873U JP5287487U JP5287487U JPS63159873U JP S63159873 U JPS63159873 U JP S63159873U JP 5287487 U JP5287487 U JP 5287487U JP 5287487 U JP5287487 U JP 5287487U JP S63159873 U JPS63159873 U JP S63159873U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- land portions
- conductive pattern
- conductive patterns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011241 protective layer Substances 0.000 description 1
Description
第1図は本考案のプリント基板の一実施例を示
す斜視図、第2図は従来のプリント基板の電子部
品取付状況を示す斜視図である。
1……プリント基板、2……電子部品、3,3
a……導電パターン、4,4a……取付穴、5,
5a……ランド部、6……リード端子、7……保
護層。
FIG. 1 is a perspective view showing an embodiment of the printed circuit board of the present invention, and FIG. 2 is a perspective view showing how electronic components are mounted on a conventional printed circuit board. 1...Printed circuit board, 2...Electronic components, 3,3
a... Conductive pattern, 4, 4a... Mounting hole, 5,
5a... Land portion, 6... Lead terminal, 7... Protective layer.
Claims (1)
つ前記導電パターンのランド部間に他の導電パタ
ーンが設けられているプリント基板において、前
記ランド部間に前記他の導電パターンを覆うシル
ク印刷層が設けられていることを特徴とするプリ
ント基板。 In a printed circuit board having at least two or more conductive patterns and in which another conductive pattern is provided between the land portions of the conductive patterns, a silk printing layer covering the other conductive pattern is provided between the land portions. A printed circuit board characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5287487U JPS63159873U (en) | 1987-04-08 | 1987-04-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5287487U JPS63159873U (en) | 1987-04-08 | 1987-04-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63159873U true JPS63159873U (en) | 1988-10-19 |
Family
ID=30878439
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5287487U Pending JPS63159873U (en) | 1987-04-08 | 1987-04-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63159873U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5818368B2 (en) * | 1973-02-16 | 1983-04-12 | バイエル アクチエンゲゼルシヤフト | Hatsupojiyushinoseizouhou |
JPS59119787A (en) * | 1982-12-27 | 1984-07-11 | 株式会社日立製作所 | Method of preventing shortcircuit in integrated circuit board |
-
1987
- 1987-04-08 JP JP5287487U patent/JPS63159873U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5818368B2 (en) * | 1973-02-16 | 1983-04-12 | バイエル アクチエンゲゼルシヤフト | Hatsupojiyushinoseizouhou |
JPS59119787A (en) * | 1982-12-27 | 1984-07-11 | 株式会社日立製作所 | Method of preventing shortcircuit in integrated circuit board |