JPS59119787A - Method of preventing shortcircuit in integrated circuit board - Google Patents

Method of preventing shortcircuit in integrated circuit board

Info

Publication number
JPS59119787A
JPS59119787A JP22681982A JP22681982A JPS59119787A JP S59119787 A JPS59119787 A JP S59119787A JP 22681982 A JP22681982 A JP 22681982A JP 22681982 A JP22681982 A JP 22681982A JP S59119787 A JPS59119787 A JP S59119787A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit board
conductor
lead
preventing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22681982A
Other languages
Japanese (ja)
Inventor
角田 勝志
義人 大村
池田 和男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP22681982A priority Critical patent/JPS59119787A/en
Publication of JPS59119787A publication Critical patent/JPS59119787A/en
Pending legal-status Critical Current

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、集積回路基板における導体と、電解コンデン
サ等のリードセンの短絡防止に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to prevention of short circuit between a conductor in an integrated circuit board and a lead sensor such as an electrolytic capacitor.

〔従来技術〕[Prior art]

第1図に従来の集積回路基板の断面図を示す。 FIG. 1 shows a cross-sectional view of a conventional integrated circuit board.

絶縁基板1上に、導体2および導体6ビ印刷し、ガラス
レジスト4ケ印刷したのち、リード部品。
After printing conductors 2 and 6 conductors on insulating substrate 1, and printing 4 glass resists, lead parts were formed.

5のリードセン6′?:挿入穴7に挿入する。そののち
リード部品のリードセン6と導体3は、半田8により固
着される。ここで導体2とリード部品のリードセン6は
、半田レジスト4により絶縁されるが、通常半田レジス
ト4は熱及び機械的ストレスに耐し、十分な耐久力Zも
だないため基板保管時や、リードセン挿入時に半田レジ
スト4の絶縁が劣化し、導体2とリードセン6が短絡す
る現象が発生した。
5 lead sen 6′? : Insert into insertion hole 7. Thereafter, the lead sensor 6 of the lead component and the conductor 3 are fixed with solder 8. Here, the conductor 2 and the lead sensor 6 of the lead component are insulated by a solder resist 4, but since the solder resist 4 normally resists heat and mechanical stress and does not have sufficient durability Z, During insertion, the insulation of the solder resist 4 deteriorated, causing a short circuit between the conductor 2 and the lead sensor 6.

を発明の目的〕 本発明の目的は、上記した従来技術の欠点をなくし、集
積回路基板の導体と、リード部品のリードセンの絶縁Y
改善するものである。
An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to improve insulation between the conductor of an integrated circuit board and the lead sensor of a lead component.
It is something to improve.

〔発明の概要〕[Summary of the invention]

上記した従来技術の欠点をなくすため、集積回路基板の
導体上に、誘電体ガラスの印刷を行ない、導体とリード
部品のリードセンの絶縁を改善するものである。
In order to eliminate the above-mentioned drawbacks of the prior art, dielectric glass is printed on the conductor of the integrated circuit board to improve the insulation between the conductor and the lead sensor of the lead component.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を矛2図により説明する。絶縁基
板1上に、導体2および導体3乞印刷し、牙1誘電体ガ
ラス91,1−2誘電体ガラス10.半田レジスト4乞
印刷する。そののちリード部品のリードセン6は、挿入
穴7に挿入され、半田8により導体6と固着されるが、
矛1誘電体10.半田レジスト4で構成される絶縁層に
より、導体2とリード部品のリードセン6は十分に絶縁
される。
Embodiments of the present invention will be described below with reference to FIG. The conductor 2 and the conductor 3 are printed on the insulating substrate 1, and the dielectric glass 91, 1-2 dielectric glass 10. Print 4 pieces of solder resist. After that, the lead sensor 6 of the lead component is inserted into the insertion hole 7 and fixed to the conductor 6 with solder 8.
Spear 1 Dielectric 10. The conductor 2 and the lead sensor 6 of the lead component are sufficiently insulated by the insulating layer composed of the solder resist 4.

なお上記実施例では誘電体ガラスの印刷72層としたが
、1層でもよ(、又半田レジストの印刷はなくてもよい
In the above embodiment, 72 layers of dielectric glass were printed, but it may be one layer (or printing of solder resist may not be necessary).

〔発明の効果〕〔Effect of the invention〕

本発明によれば、リード部品のリードセンと集積回路基
板の導体との短絡が防止される。
According to the present invention, short circuit between the lead sensor of the lead component and the conductor of the integrated circuit board is prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

矛1図は従来の集積回路基板の断面図1,3172図は
本発明の一実施例の集積回路基板の断面図である。 1・・・絶縁基板、2・・導体、6・・導体、4・・・
ガラスレジスト、5・・・リード部品、6・・・リード
部品のリードセン、7・・・挿入穴、8・・・半田、9
・・・・・・矛1誘電体層、10・・・、31−2銹m
体層。
Figure 1 is a sectional view of a conventional integrated circuit board, and Figure 3172 is a sectional view of an integrated circuit board according to an embodiment of the present invention. 1...Insulating substrate, 2...Conductor, 6...Conductor, 4...
Glass resist, 5... Lead component, 6... Lead sensor for lead component, 7... Insertion hole, 8... Solder, 9
....1 dielectric layer, 10..., 31-2 m
Body layer.

Claims (1)

【特許請求の範囲】[Claims] 導体と部品を、半田で固着させる構造をもつ集積回路基
板において、電解コンデンサ等のリード部品のり−ドセ
ンと、接続されるべきでない導体との短絡を防止するた
めに、導体上に誘電体ガラスの絶縁層を設けたこと乞特
徴とする集積回路基板における短絡防止法。
In integrated circuit boards that have a structure in which conductors and components are fixed with solder, a layer of dielectric glass is placed on the conductor to prevent short circuits between lead components such as electrolytic capacitors and conductors that should not be connected. A method for preventing short circuits in integrated circuit boards, which is characterized by providing an insulating layer.
JP22681982A 1982-12-27 1982-12-27 Method of preventing shortcircuit in integrated circuit board Pending JPS59119787A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22681982A JPS59119787A (en) 1982-12-27 1982-12-27 Method of preventing shortcircuit in integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22681982A JPS59119787A (en) 1982-12-27 1982-12-27 Method of preventing shortcircuit in integrated circuit board

Publications (1)

Publication Number Publication Date
JPS59119787A true JPS59119787A (en) 1984-07-11

Family

ID=16851087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22681982A Pending JPS59119787A (en) 1982-12-27 1982-12-27 Method of preventing shortcircuit in integrated circuit board

Country Status (1)

Country Link
JP (1) JPS59119787A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63159873U (en) * 1987-04-08 1988-10-19

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63159873U (en) * 1987-04-08 1988-10-19

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