JPS63149546U - - Google Patents

Info

Publication number
JPS63149546U
JPS63149546U JP1987042905U JP4290587U JPS63149546U JP S63149546 U JPS63149546 U JP S63149546U JP 1987042905 U JP1987042905 U JP 1987042905U JP 4290587 U JP4290587 U JP 4290587U JP S63149546 U JPS63149546 U JP S63149546U
Authority
JP
Japan
Prior art keywords
semiconductor package
back electrode
adhesive
electrode
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987042905U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987042905U priority Critical patent/JPS63149546U/ja
Publication of JPS63149546U publication Critical patent/JPS63149546U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a〜cはこの考案の半導体パツケージの
一実施例を示す正面図、側面図、裏面図、第2図
は、第1図の半導体パツケージを絶縁性基板に装
着した状態を示す断面図、第3図a〜cは従来の
半導体パツケージを示す正面図、側面図、裏面図
、第4図は半導体パツケージを絶縁性基板に組み
込んだ状態を示す斜視図、第5図は、第4図のA
―A断面図である。 図において、1はヘツダ、2はリード電極、3
は裏面電極、3aは接着ハンダの非接着面とした
裏面電極側面、4は半導体素子、5は絶縁性基板
、6は回路パターン、7は嵌合凹部、8は放熱板
、9は接着ハンダである。なお、各図中の同一符
号は同一または相当部分を示す。
1A to 1C are front, side, and back views showing one embodiment of the semiconductor package of this invention, and FIG. 2 is a sectional view showing the semiconductor package of FIG. 1 mounted on an insulating substrate. , FIGS. 3a to 3c are front, side, and back views of a conventional semiconductor package, FIG. 4 is a perspective view of the semiconductor package assembled into an insulating substrate, and FIG. A of
-A cross-sectional view. In the figure, 1 is a header, 2 is a lead electrode, and 3 is a header.
3a is the back electrode, 3a is the side surface of the back electrode which is the non-adhesive surface of the adhesive solder, 4 is the semiconductor element, 5 is the insulating substrate, 6 is the circuit pattern, 7 is the fitting recess, 8 is the heat sink, and 9 is the adhesive solder. be. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子を内蔵し、リード電極と裏面電極を
備えた半導体パツケージにおいて、前記半導体パ
ツケージを絶縁性基板に形成された嵌合凹部に嵌
合して前記裏面電極を放熱板上に接着ハンダによ
り接着する際、前記半導体パツケージの信号入力
側の裏面電極側面を前記接着ハンダの非接着面と
したことを特徴とする半導体パツケージ。
In a semiconductor package containing a semiconductor element and having a lead electrode and a back electrode, the semiconductor package is fitted into a fitting recess formed in an insulating substrate, and the back electrode is bonded onto a heat sink using adhesive solder. A semiconductor package characterized in that a side surface of the back electrode on the signal input side of the semiconductor package is a non-adhesive surface of the adhesive solder.
JP1987042905U 1987-03-23 1987-03-23 Pending JPS63149546U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987042905U JPS63149546U (en) 1987-03-23 1987-03-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987042905U JPS63149546U (en) 1987-03-23 1987-03-23

Publications (1)

Publication Number Publication Date
JPS63149546U true JPS63149546U (en) 1988-10-03

Family

ID=30859263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987042905U Pending JPS63149546U (en) 1987-03-23 1987-03-23

Country Status (1)

Country Link
JP (1) JPS63149546U (en)

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