JPS6245837U - - Google Patents
Info
- Publication number
- JPS6245837U JPS6245837U JP1985136459U JP13645985U JPS6245837U JP S6245837 U JPS6245837 U JP S6245837U JP 1985136459 U JP1985136459 U JP 1985136459U JP 13645985 U JP13645985 U JP 13645985U JP S6245837 U JPS6245837 U JP S6245837U
- Authority
- JP
- Japan
- Prior art keywords
- package base
- hybrid
- joined
- soldering
- base side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007747 plating Methods 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims 3
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Description
第１図および第２図は、この考案のハイブリツ
ドＩＣの一実施例を示す断面図、第３図は従来の
ハイブリツドＩＣを示す図である。
図中１ａ〜１ｂはパツケージベース、２はサブ
ストレート、３はＩＣチツプ、４ａ，４ｂはボン
デイングワイヤ、５ａ〜５ｂはリード、６ａ〜６
ｃはカバー、７ａ〜７ｆはメツキ層、８ａ〜８ｆ
は半田である。なお、図中同一符号は同一または
相当部分を示す。
1 and 2 are cross-sectional views showing an embodiment of the hybrid IC of this invention, and FIG. 3 is a view showing a conventional hybrid IC. In the figure, 1a and 1b are package bases, 2 is a substrate, 3 is an IC chip, 4a and 4b are bonding wires, 5a and 5b are leads, and 6a and 6
c is a cover, 7a to 7f are plating layers, 8a to 8f
is solder. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
うに構成したハイブリツドＩＣにおいて、パツケ
ージベース側の半田付面（メツキ層）を一平面の
ものから二段に分離し、上記パツケージベース側
の半田付面に接合できるカバーを二種類設けたこ
とを特徴とするハイブリツドＩＣ。 In a hybrid IC configured so that the package base and cover are joined by soldering, the soldering surface (plating layer) on the package base side is separated from a single plane into two layers and joined to the soldering surface on the package base side. A hybrid IC characterized by having two types of covers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985136459U JPS6245837U (en) | 1985-09-06 | 1985-09-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985136459U JPS6245837U (en) | 1985-09-06 | 1985-09-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6245837U true JPS6245837U (en) | 1987-03-19 |
Family
ID=31039591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985136459U Pending JPS6245837U (en) | 1985-09-06 | 1985-09-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6245837U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0623688U (en) * | 1992-08-27 | 1994-03-29 | 高砂電器産業株式会社 | Empty can processor |
-
1985
- 1985-09-06 JP JP1985136459U patent/JPS6245837U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0623688U (en) * | 1992-08-27 | 1994-03-29 | 高砂電器産業株式会社 | Empty can processor |