JPS6153934U - - Google Patents

Info

Publication number
JPS6153934U
JPS6153934U JP1984137689U JP13768984U JPS6153934U JP S6153934 U JPS6153934 U JP S6153934U JP 1984137689 U JP1984137689 U JP 1984137689U JP 13768984 U JP13768984 U JP 13768984U JP S6153934 U JPS6153934 U JP S6153934U
Authority
JP
Japan
Prior art keywords
wiring layer
solder bump
bump electrodes
wiring
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984137689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984137689U priority Critical patent/JPS6153934U/ja
Publication of JPS6153934U publication Critical patent/JPS6153934U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/11011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/11013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the bump connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図Ａは本考案による半導体装置用配線基板
を説明する上面図、第１図Ｂは本考案による半導
体装置用配線基板を用いた半導体装置を説明する
断面図、第２図イ，ロ，ハは従来のフエースダウ
ンボンドを説明する断面図である。 主な図番の説明、１は絶縁基板、２は配線層、
３は巾狭部分である。 FIG. 1A is a top view illustrating a wiring board for a semiconductor device according to the present invention, FIG. 1B is a cross-sectional view illustrating a semiconductor device using a wiring board for a semiconductor device according to the present invention, and FIGS. C is a sectional view illustrating a conventional face-down bond. Explanation of the main drawing numbers, 1 is the insulating substrate, 2 is the wiring layer,
3 is the narrow part.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板上に半導体チツプの半田バンプ電極に
対応して延在された配線層と該配線層の前記半田
バンプ電極が当接するボンデイングパツド部の外
側を巾狭に形成して成る半導体装置用配線基板。 Wiring for a semiconductor device comprising a wiring layer extending on an insulating substrate to correspond to the solder bump electrodes of a semiconductor chip, and a narrow outer side of a bonding pad portion where the solder bump electrodes of the wiring layer come into contact. substrate.
JP1984137689U 1984-09-11 1984-09-11 Pending JPS6153934U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984137689U JPS6153934U (en) 1984-09-11 1984-09-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984137689U JPS6153934U (en) 1984-09-11 1984-09-11

Publications (1)

Publication Number Publication Date
JPS6153934U true JPS6153934U (en) 1986-04-11

Family

ID=30696100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984137689U Pending JPS6153934U (en) 1984-09-11 1984-09-11

Country Status (1)

Country Link
JP (1) JPS6153934U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6359376U (en) * 1986-10-07 1988-04-20
JP2010010611A (en) * 2008-06-30 2010-01-14 Toshiba Corp Printed circuit board and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4846866A (en) * 1971-10-12 1973-07-04
JPS4983860A (en) * 1972-12-22 1974-08-12
JPS49113163A (en) * 1973-02-14 1974-10-29

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4846866A (en) * 1971-10-12 1973-07-04
JPS4983860A (en) * 1972-12-22 1974-08-12
JPS49113163A (en) * 1973-02-14 1974-10-29

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6359376U (en) * 1986-10-07 1988-04-20
JP2010010611A (en) * 2008-06-30 2010-01-14 Toshiba Corp Printed circuit board and electronic equipment

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