JPS62122359U - - Google Patents

Info

Publication number
JPS62122359U
JPS62122359U JP1986009003U JP900386U JPS62122359U JP S62122359 U JPS62122359 U JP S62122359U JP 1986009003 U JP1986009003 U JP 1986009003U JP 900386 U JP900386 U JP 900386U JP S62122359 U JPS62122359 U JP S62122359U
Authority
JP
Japan
Prior art keywords
chip
substrate
electrode
bonded
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986009003U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986009003U priority Critical patent/JPS62122359U/ja
Publication of JPS62122359U publication Critical patent/JPS62122359U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例になる断面図、第２
図は第１図の平面図、第３図は従来の構造例の断
面図である。 １…基板電極、２，５…ＩＣ、３，６…ＩＣ電
極、７…ボンデイングワイヤー。 Figure 1 is a cross-sectional view of one embodiment of the present invention;
The figure is a plan view of FIG. 1, and FIG. 3 is a sectional view of a conventional structural example. 1... Substrate electrode, 2, 5... IC, 3, 6... IC electrode, 7... Bonding wire.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板にチツプを搭載する構造に於いて、基板上
の電極とチツプ電極とを接続する時ワイヤレスボ
ンデイングに依り接続された第１のチツプと、第
１のチツプ上に搭載され基板電極との間がワイヤ
ーボンデイングされた第２のチツプとを有する事
を特徴とする半導体装置。 In a structure in which a chip is mounted on a substrate, when an electrode on the substrate and a chip electrode are connected, there is a gap between the first chip connected by wireless bonding and the substrate electrode mounted on the first chip. A semiconductor device characterized by having a second chip wire-bonded.
JP1986009003U 1986-01-24 1986-01-24 Pending JPS62122359U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986009003U JPS62122359U (en) 1986-01-24 1986-01-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986009003U JPS62122359U (en) 1986-01-24 1986-01-24

Publications (1)

Publication Number Publication Date
JPS62122359U true JPS62122359U (en) 1987-08-03

Family

ID=30793906

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986009003U Pending JPS62122359U (en) 1986-01-24 1986-01-24

Country Status (1)

Country Link
JP (1) JPS62122359U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0232547A (en) * 1988-07-22 1990-02-02 Matsushita Electric Ind Co Ltd Semiconductor packaging device
JP2011082555A (en) * 2010-12-20 2011-04-21 Renesas Electronics Corp Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737867A (en) * 1980-08-18 1982-03-02 Mitsubishi Electric Corp Semiconductor device
JPS5867057A (en) * 1981-10-16 1983-04-21 Nec Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737867A (en) * 1980-08-18 1982-03-02 Mitsubishi Electric Corp Semiconductor device
JPS5867057A (en) * 1981-10-16 1983-04-21 Nec Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0232547A (en) * 1988-07-22 1990-02-02 Matsushita Electric Ind Co Ltd Semiconductor packaging device
JP2011082555A (en) * 2010-12-20 2011-04-21 Renesas Electronics Corp Semiconductor device

Similar Documents

Publication Publication Date Title
JPH0369232U (en)
JPH0474463U (en)
JPH0252452U (en)
JPS6310551U (en)
JPS62160557U (en)
JPS63102233U (en)
JPS6364035U (en)
JPS6289157U (en)
JPH028053U (en)
JPS63180929U (en)
JPH044767U (en)
JPS6424848U (en)
JPH0313754U (en)
JPS62152448U (en)
JPS6351441U (en)
JPS6280345U (en)
JPS6343432U (en)
JPS6255350U (en)
JPS63201345U (en)
JPH02102734U (en)
JPS62134240U (en)
JPS6192071U (en)
JPS61192447U (en)
JPS62160545U (en)
JPH0247034U (en)