JPS6312977U - - Google Patents
Info
- Publication number
- JPS6312977U JPS6312977U JP9284486U JP9284486U JPS6312977U JP S6312977 U JPS6312977 U JP S6312977U JP 9284486 U JP9284486 U JP 9284486U JP 9284486 U JP9284486 U JP 9284486U JP S6312977 U JPS6312977 U JP S6312977U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output signal
- circuit
- divider circuit
- frequency divider
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は、本考案の一実施例を示す回路図、第
２図は同期ＡＦＣ回路を示す回路図、及び第３図
は本考案の説明に供するための波形図である。
１１……１／４分周回路、１４……１／８分周
回路、２１……ナンドゲート、２２……第４アン
ドゲート、２４……第５アンドゲート。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a synchronous AFC circuit, and FIG. 3 is a waveform diagram for explaining the present invention. 11 ...1/4 frequency divider circuit, 14 ...1/8 frequency divider circuit, 21...NAND gate, 22...4th AND gate, 24...5th AND gate.
Claims (1)
れる３２ｆＨの発振出力信号を分周する水平分周
回路であつて、前記発振出力信号がクロツク信号
として印加されるＤ―ＦＦから成る１／４分周回
路と、該１／４分周回路の分周出力信号がクロツ
ク信号として印加されるＤ―ＦＦから成る１／８
分周回路とから成り、前記１／８分周回路からｆ
Ｈの分周出力信号を取り出すことを特徴とする水
平分周回路。 This is a horizontal frequency divider circuit that frequency divides a 32fH oscillation output signal used in a synchronous AFC circuit of a television receiver, and is a 1/4 frequency divider circuit consisting of a D-FF to which the oscillation output signal is applied as a clock signal. and a D-FF to which the frequency-divided output signal of the 1/4 frequency divider circuit is applied as a clock signal.
f from the 1/8 frequency dividing circuit.
A horizontal frequency dividing circuit characterized in that it takes out an H frequency divided output signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9284486U JPS6312977U (en) | 1986-06-18 | 1986-06-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9284486U JPS6312977U (en) | 1986-06-18 | 1986-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6312977U true JPS6312977U (en) | 1988-01-28 |
Family
ID=30954903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9284486U Pending JPS6312977U (en) | 1986-06-18 | 1986-06-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6312977U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5752268A (en) * | 1980-09-12 | 1982-03-27 | Sanyo Electric Co Ltd | Horizontal synchronizing circuit |
| JPS5833385A (en) * | 1981-08-21 | 1983-02-26 | Hitachi Ltd | Gate pulse generating circuit |
-
1986
- 1986-06-18 JP JP9284486U patent/JPS6312977U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5752268A (en) * | 1980-09-12 | 1982-03-27 | Sanyo Electric Co Ltd | Horizontal synchronizing circuit |
| JPS5833385A (en) * | 1981-08-21 | 1983-02-26 | Hitachi Ltd | Gate pulse generating circuit |
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