JPS6017035U - timer device - Google Patents
timer deviceInfo
- Publication number
- JPS6017035U JPS6017035U JP10789183U JP10789183U JPS6017035U JP S6017035 U JPS6017035 U JP S6017035U JP 10789183 U JP10789183 U JP 10789183U JP 10789183 U JP10789183 U JP 10789183U JP S6017035 U JPS6017035 U JP S6017035U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- oscillation
- frequency
- pulses
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、従来のタイマ装置の一例を示す回路構成図、
第２図ＡないしＤは、それぞれ第１図に示したタイマ装
置各部の動作を説明するための信号波形図、第３図は、
本考案のタイマ装置の一実施例を示す回路構成図、第４
図ＡないしＧは、そ −れぞれ第３図に示したタイマ
装置各部の動作を説明するための信号波形図である。
１１・・・・・・タイマ装置、１２・・・・・・入力回
路、１３・・・・・・ラッチ回路、１４・・・・・・多
段分周回路、１５・・・・・・発振回路、Ｃ・・・・・
・コンデンサ。FIG. 1 is a circuit configuration diagram showing an example of a conventional timer device;
2A to 2D are signal waveform diagrams for explaining the operation of each part of the timer device shown in FIG. 1, and FIG.
Circuit configuration diagram showing one embodiment of the timer device of the present invention, No. 4
FIGS. A to G are signal waveform diagrams for explaining the operation of each part of the timer device shown in FIG. 3, respectively. 11...Timer device, 12...Input circuit, 13...Latch circuit, 14...Multi-stage frequency divider circuit, 15...Oscillation circuit, C...
・Capacitor.
Claims (1)
発振パルスを得る発振回路と、該発振回路の発振パルス
が供給されてこれを分周し、分周′ 周期を実質的な
時限期間とする分周回路と、前記発振回路内のコンデン
サとともに平滑回路を形成し、時限動作開始用として供
給された入力信号中のノイズ成分を平滑除去し、平滑後
の信号成分により、前記発振回路を動作せしめるととも
に、前記分周回路の分周動作期間中は、前記入力信号の
受は入れを停止する入力回路とから構成してなるタイマ
装置。An oscillation circuit that obtains oscillation pulses by periodically switching the charging and discharging of a capacitor, and a frequency divider that is supplied with the oscillation pulses of the oscillation circuit and divides the frequency of the oscillation pulses, making the division' cycle a substantial time period. forming a smoothing circuit together with the circuit and a capacitor in the oscillation circuit, smoothing and removing a noise component in an input signal supplied for starting a timed operation, and operating the oscillation circuit with the smoothed signal component; and an input circuit that stops receiving the input signal during a frequency dividing operation period of the frequency dividing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10789183U JPS6017035U (en) | 1983-07-12 | 1983-07-12 | timer device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10789183U JPS6017035U (en) | 1983-07-12 | 1983-07-12 | timer device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6017035U true JPS6017035U (en) | 1985-02-05 |
Family
ID=30251921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10789183U Pending JPS6017035U (en) | 1983-07-12 | 1983-07-12 | timer device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6017035U (en) |
-
1983
- 1983-07-12 JP JP10789183U patent/JPS6017035U/en active Pending
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