JPS5888456U - PLL circuit - Google Patents
PLL circuitInfo
- Publication number
- JPS5888456U JPS5888456U JP18360581U JP18360581U JPS5888456U JP S5888456 U JPS5888456 U JP S5888456U JP 18360581 U JP18360581 U JP 18360581U JP 18360581 U JP18360581 U JP 18360581U JP S5888456 U JPS5888456 U JP S5888456U
- Authority
- JP
- Japan
- Prior art keywords
- reciprocal
- pll circuit
- input signal
- calculation unit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、ＰＬＬ回路の一般的な構成を示す図、第２図
は、本考案によるＰＬＬ回路の一例での構成を示す図、
第３図ａ ” ｅは、それぞれ第２図における要部の一
例での波形図である。
２・・・位相比較器、３・・・ローパスフィルタ、４・
・・電圧制御形発振器、５・・・画数演算器、６・・・
積回路。FIG. 1 is a diagram showing a general configuration of a PLL circuit, and FIG. 2 is a diagram showing a configuration of an example of a PLL circuit according to the present invention.
Figures 3a and 3e are waveform diagrams of examples of essential parts in Figure 2. 2. Phase comparator, 3. Low pass filter, 4.
...Voltage controlled oscillator, 5... Stroke number calculator, 6...
product circuit.
Claims (1)
算器より得られる逆数を電圧制御形発振器の出力と積回
路で積算したうえ上記入力信号と位相比較器で比較する
構成を特徴とするＰＬＬ回路。A PLL characterized by a configuration in which the reciprocal of the amplitude of an input signal is obtained by a reciprocal calculation unit, the reciprocal obtained from the calculation unit is integrated with the output of a voltage-controlled oscillator by a product circuit, and then compared with the input signal by a phase comparator. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18360581U JPS5888456U (en) | 1981-12-11 | 1981-12-11 | PLL circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18360581U JPS5888456U (en) | 1981-12-11 | 1981-12-11 | PLL circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5888456U true JPS5888456U (en) | 1983-06-15 |
Family
ID=29983017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18360581U Pending JPS5888456U (en) | 1981-12-11 | 1981-12-11 | PLL circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5888456U (en) |
-
1981
- 1981-12-11 JP JP18360581U patent/JPS5888456U/en active Pending
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