JPS5866734U - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPS5866734U
JPS5866734U JP16059081U JP16059081U JPS5866734U JP S5866734 U JPS5866734 U JP S5866734U JP 16059081 U JP16059081 U JP 16059081U JP 16059081 U JP16059081 U JP 16059081U JP S5866734 U JPS5866734 U JP S5866734U
Authority
JP
Japan
Prior art keywords
oscillation circuit
inverter
input end
capacitor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16059081U
Other languages
Japanese (ja)
Inventor
裕治 西
光彦 木下
Original Assignee
富士通テン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通テン株式会社 filed Critical 富士通テン株式会社
Priority to JP16059081U priority Critical patent/JPS5866734U/en
Publication of JPS5866734U publication Critical patent/JPS5866734U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の発振回路の一例を示す構成図、第2図は
その各部波形図、第3図はC−MOSにお −けるラッ
チアップの説明図、第4図は本考案の一実施例を示す構
成図、第5図はその各部波形図である。 図中、IN■はシュミットインバータ、R工は帰還抵抗
、C□はコンデンサである。
Fig. 1 is a configuration diagram showing an example of a conventional oscillation circuit, Fig. 2 is a waveform diagram of each part thereof, Fig. 3 is an explanatory diagram of latch-up in C-MOS, and Fig. 4 is an implementation of the present invention. A configuration diagram showing an example, and FIG. 5 are waveform diagrams of each part thereof. In the figure, IN■ is a Schmitt inverter, R is a feedback resistor, and C□ is a capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シュミットインバータと、該インバータの入力端とアー
ス間に接続されるコンデンサと、該インバータの出力端
から該入力端にかけて接続される帰還抵抗とを備え、そ
して該抵抗およびコンデンサの値によって発振周波数を
設定してなることを特徴とする発振回路。
It includes a Schmitt inverter, a capacitor connected between the input end of the inverter and ground, and a feedback resistor connected from the output end of the inverter to the input end, and the oscillation frequency is set by the values of the resistor and capacitor. An oscillation circuit characterized by:
JP16059081U 1981-10-28 1981-10-28 oscillation circuit Pending JPS5866734U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16059081U JPS5866734U (en) 1981-10-28 1981-10-28 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16059081U JPS5866734U (en) 1981-10-28 1981-10-28 oscillation circuit

Publications (1)

Publication Number Publication Date
JPS5866734U true JPS5866734U (en) 1983-05-06

Family

ID=29952984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16059081U Pending JPS5866734U (en) 1981-10-28 1981-10-28 oscillation circuit

Country Status (1)

Country Link
JP (1) JPS5866734U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0636383U (en) * 1992-10-01 1994-05-13 アスコ株式会社 Switching boost circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52108760A (en) * 1976-03-09 1977-09-12 Mitsubishi Electric Corp Oscillation circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52108760A (en) * 1976-03-09 1977-09-12 Mitsubishi Electric Corp Oscillation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0636383U (en) * 1992-10-01 1994-05-13 アスコ株式会社 Switching boost circuit

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