JPS59104614U - Differential amplifier circuit using three operational amplifiers - Google Patents
Differential amplifier circuit using three operational amplifiersInfo
- Publication number
- JPS59104614U JPS59104614U JP19625982U JP19625982U JPS59104614U JP S59104614 U JPS59104614 U JP S59104614U JP 19625982 U JP19625982 U JP 19625982U JP 19625982 U JP19625982 U JP 19625982U JP S59104614 U JPS59104614 U JP S59104614U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- operational amplifiers
- differential amplifier
- amplifier circuit
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の差動増幅回路の一例を示す回路図、第2
図は従来の差動増幅回路の他の例を示す回路図、第3図
は本考案による差動増幅回路の実施例を示す回路図であ
る。
図において、A1−A3は演算増幅器、R11〜R18
は抵抗、Cはコンデンサである。Figure 1 is a circuit diagram showing an example of a conventional differential amplifier circuit; Figure 2 is a circuit diagram showing an example of a conventional differential amplifier circuit;
This figure is a circuit diagram showing another example of the conventional differential amplifier circuit, and FIG. 3 is a circuit diagram showing an embodiment of the differential amplifier circuit according to the present invention. In the figure, A1-A3 are operational amplifiers, R11-R18
is a resistor and C is a capacitor.
Claims (1)
算増幅器の出力側を第1の抵抗R□2を介して反転入力
端子に帰還接続し、前記第2の演算増幅器の出力側を第
2の抵抗R14を介して反転入力端子に帰還接続し、前
記第1の抵抗R1□の反転入力端子側と前記第2の抵抗
R,の反転入力端子側との間を第3の抵抗により接続改
頁に前記第1および第2の演算増幅器の出力側をそれぞ
れ第4の抵抗R15および第5の抵抗R□7を介して前
記第3の演算増幅器に接続されてなる差動増幅回路にお
いて、前記第3の抵抗を直列に接続された2つの抵抗に
分割し、これ等2つの抵抗の直列接続点をコンデンサを
介して接地したことを特徴とする3個の演算増幅器を用
いた差動増幅回路。comprising first, second, and third operational amplifiers, the output side of the first operational amplifier is feedback-connected to the inverting input terminal via a first resistor R□2, and the output side of the second operational amplifier is A third resistor is connected between the inverting input terminal side of the first resistor R1□ and the inverting input terminal side of the second resistor R. A differential amplifier in which the output sides of the first and second operational amplifiers are connected to the third operational amplifier via a fourth resistor R15 and a fifth resistor R□7, respectively. The circuit uses three operational amplifiers, characterized in that the third resistor is divided into two resistors connected in series, and the series connection point of these two resistors is grounded via a capacitor. Differential amplifier circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19625982U JPS59104614U (en) | 1982-12-28 | 1982-12-28 | Differential amplifier circuit using three operational amplifiers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19625982U JPS59104614U (en) | 1982-12-28 | 1982-12-28 | Differential amplifier circuit using three operational amplifiers |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59104614U true JPS59104614U (en) | 1984-07-14 |
JPS636887Y2 JPS636887Y2 (en) | 1988-02-27 |
Family
ID=30421169
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19625982U Granted JPS59104614U (en) | 1982-12-28 | 1982-12-28 | Differential amplifier circuit using three operational amplifiers |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59104614U (en) |
-
1982
- 1982-12-28 JP JP19625982U patent/JPS59104614U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS636887Y2 (en) | 1988-02-27 |
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