JPS59189334U - comparator - Google Patents
comparatorInfo
- Publication number
- JPS59189334U JPS59189334U JP8275683U JP8275683U JPS59189334U JP S59189334 U JPS59189334 U JP S59189334U JP 8275683 U JP8275683 U JP 8275683U JP 8275683 U JP8275683 U JP 8275683U JP S59189334 U JPS59189334 U JP S59189334U
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- input terminal
- inverting input
- terminal side
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は入力と出力とが反転関係となるコンパレータの
回路例、第２図は従来の入力と出力とが非反転の関係と
なるコンパレータの回路例、第３図は本考案に係るコン
パレータの回路構成、第４図は具体的一実施例の特性図
を示している。
図中、１，２は演算増幅器、Ｒ□ないしＲ１１は抵
。
抗を表わしている。Figure 1 shows an example of a comparator circuit in which the input and output are in an inverted relationship, Figure 2 is an example of a conventional comparator circuit in which the input and output are in a non-inverted relationship, and Figure 3 is a circuit example of a comparator according to the present invention. Circuit configuration: FIG. 4 shows a characteristic diagram of a specific embodiment. In the figure, 1 and 2 are operational amplifiers, and R□ to R11 are resistors.
. It represents resistance.
Claims (1)
端子側に入力信号をそれぞれ入力すると共に当該反転入
力端子側に負帰還を行った形のコンパレータにおいて、
当該コンパレータの出力側と演算増幅器の非反転入力端
子との間に帰還抵抗を接続したことを特徴とするコンパ
レータ。In a comparator in which a reference voltage is input to the inverting input terminal side of an operational amplifier, an input signal is input to the non-inverting input terminal side, and negative feedback is provided to the inverting input terminal side,
A comparator characterized in that a feedback resistor is connected between the output side of the comparator and a non-inverting input terminal of an operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8275683U JPS59189334U (en) | 1983-05-31 | 1983-05-31 | comparator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8275683U JPS59189334U (en) | 1983-05-31 | 1983-05-31 | comparator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59189334U true JPS59189334U (en) | 1984-12-15 |
Family
ID=30212712
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8275683U Pending JPS59189334U (en) | 1983-05-31 | 1983-05-31 | comparator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59189334U (en) |
-
1983
- 1983-05-31 JP JP8275683U patent/JPS59189334U/en active Pending
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