JPS5851694U - Double wave rectifier circuit - Google Patents
Double wave rectifier circuitInfo
- Publication number
- JPS5851694U JPS5851694U JP14888481U JP14888481U JPS5851694U JP S5851694 U JPS5851694 U JP S5851694U JP 14888481 U JP14888481 U JP 14888481U JP 14888481 U JP14888481 U JP 14888481U JP S5851694 U JPS5851694 U JP S5851694U
- Authority
- JP
- Japan
- Prior art keywords
- rectifier circuit
- diode
- wave rectifier
- double wave
- circuit including
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は一般的な両波整流回路を示す回路図、第２図は
本考案の両波整流回路を示す回路図である。
２１・・・・・・入力端子、２３． ２４． ２５．
２６・・・・・・第１整流回路、２９． ３０． ３１
． ３２・・・・・・第２整流回路、３３・・・・・・
演算増幅器、３５．３６・・・・・・反転および非反転
入力端子、１４・・・・・・非制御回路。FIG. 1 is a circuit diagram showing a general double-wave rectifier circuit, and FIG. 2 is a circuit diagram showing a double-wave rectifier circuit according to the present invention. 21... Input terminal, 23. 24. 25.
26...first rectifier circuit, 29. 30. 31
．． 32... Second rectifier circuit, 33...
Operational amplifier, 35.36... Inverting and non-inverting input terminal, 14... Non-control circuit.
Claims (1)
出力端と接地間に並列に接続されるコンデンサおよび抵
抗よりなる第１ｃＲ回路とから構成される第１整流回路
と、前記入力信号が印加され且つ前記第１ダイオードと
は逆極性の第２ダイオードと該第２ダイオードの出力端
と接地間に並列に接続されるコンデンサおよび抵抗より
なる第２ＣＲ回路とから構成される第２整流回路と、反
転入力端子に前記第１整流回路の出力が印加されると共
に非反転入力端子に前記第２整流回路の出力が印加され
る演算増幅器とよりなる両波整流回路。a first rectifier circuit including a first diode to which an input signal is applied; and a first cR circuit including a capacitor and a resistor connected in parallel between the output terminal of the diode and ground; a second rectifier circuit including a second diode having a polarity opposite to that of the first diode; a second CR circuit including a capacitor and a resistor connected in parallel between the output terminal of the second diode and ground; A double-wave rectifier circuit comprising an operational amplifier having a terminal to which the output of the first rectifier circuit is applied, and a non-inverting input terminal to which the output of the second rectifier circuit is applied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14888481U JPS5851694U (en) | 1981-10-06 | 1981-10-06 | Double wave rectifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14888481U JPS5851694U (en) | 1981-10-06 | 1981-10-06 | Double wave rectifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5851694U true JPS5851694U (en) | 1983-04-07 |
Family
ID=29941683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14888481U Pending JPS5851694U (en) | 1981-10-06 | 1981-10-06 | Double wave rectifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5851694U (en) |
-
1981
- 1981-10-06 JP JP14888481U patent/JPS5851694U/en active Pending
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