JPS5959022U - Differential amplifier negative feedback circuit - Google Patents

Differential amplifier negative feedback circuit

Info

Publication number
JPS5959022U
JPS5959022U JP5499281U JP5499281U JPS5959022U JP S5959022 U JPS5959022 U JP S5959022U JP 5499281 U JP5499281 U JP 5499281U JP 5499281 U JP5499281 U JP 5499281U JP S5959022 U JPS5959022 U JP S5959022U
Authority
JP
Japan
Prior art keywords
negative feedback
differential amplifier
feedback circuit
amplifier negative
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5499281U
Other languages
Japanese (ja)
Other versions
JPS641779Y2 (en
Inventor
隆一 福田
Original Assignee
日本コロムビア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本コロムビア株式会社 filed Critical 日本コロムビア株式会社
Priority to JP5499281U priority Critical patent/JPS5959022U/en
Publication of JPS5959022U publication Critical patent/JPS5959022U/en
Application granted granted Critical
Publication of JPS641779Y2 publication Critical patent/JPS641779Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図、第２図及び第３図は従来例を示す回路図、第４
図及び第５図はそれぞれ本考案の一実施例を示す回路図
である。 図中、３，４．１５及び１６はＦＥＴ、　１１．１２及
び１８は抵抗、１９はコンデンサである。Figures 1, 2, and 3 are circuit diagrams showing conventional examples;
5 and 5 are circuit diagrams each showing an embodiment of the present invention. In the figure, 3, 4, 15 and 16 are FETs, 11, 12 and 18 are resistors, and 19 is a capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力端子と負帰還端子を有する少くとも一つの差動増幅
器と、該差動増幅器の負帰還端子に出力信号を抵抗を介
して負帰還する手段と、出力信号を分圧して得た分圧出
力をコンデンサを介して負帰還する手段とを有し、上記
コンデンサにダイオードを並列に接続することを特徴と
する差動増幅器の負帰還回路。　　　　゛at least one differential amplifier having an input terminal and a negative feedback terminal; means for negatively feeding back an output signal to the negative feedback terminal of the differential amplifier via a resistor; and a divided voltage output obtained by dividing the output signal. A negative feedback circuit for a differential amplifier, characterized in that the negative feedback circuit has a means for negative feedback through a capacitor, and a diode is connected in parallel to the capacitor.゛
JP5499281U 1981-04-16 1981-04-16 Differential amplifier negative feedback circuit Granted JPS5959022U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5499281U JPS5959022U (en) 1981-04-16 1981-04-16 Differential amplifier negative feedback circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5499281U JPS5959022U (en) 1981-04-16 1981-04-16 Differential amplifier negative feedback circuit

Publications (2)

Publication Number Publication Date
JPS5959022U true JPS5959022U (en) 1984-04-17
JPS641779Y2 JPS641779Y2 (en) 1989-01-17

Family

ID=30185321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5499281U Granted JPS5959022U (en) 1981-04-16 1981-04-16 Differential amplifier negative feedback circuit

Country Status (1)

Country Link
JP (1) JPS5959022U (en)

Also Published As

Publication number Publication date
JPS641779Y2 (en) 1989-01-17

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