JPS58132410U - rear equalizer circuit - Google Patents

rear equalizer circuit

Info

Publication number
JPS58132410U
JPS58132410U JP2924282U JP2924282U JPS58132410U JP S58132410 U JPS58132410 U JP S58132410U JP 2924282 U JP2924282 U JP 2924282U JP 2924282 U JP2924282 U JP 2924282U JP S58132410 U JPS58132410 U JP S58132410U
Authority
JP
Japan
Prior art keywords
equalizer circuit
amplifier
rear equalizer
output
time constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2924282U
Other languages
Japanese (ja)
Inventor
司 西野
Original Assignee
日本コロムビア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本コロムビア株式会社 filed Critical 日本コロムビア株式会社
Priority to JP2924282U priority Critical patent/JPS58132410U/en
Publication of JPS58132410U publication Critical patent/JPS58132410U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本考案に適用出来る増幅器の一例を
示す回路図、第3図は本考案の一実施例を示す回路図、
第4図〜第6図は特性図、第7図は本考案の他の実施例
を示す回路図である。 図中、3はFET、15はトランジスタ、9゜11は定
電流源、20.21及び23は抵抗、22及び24はコ
ンデンサである。
1 and 2 are circuit diagrams showing an example of an amplifier applicable to the present invention, and FIG. 3 is a circuit diagram showing an embodiment of the present invention,
4 to 6 are characteristic diagrams, and FIG. 7 is a circuit diagram showing another embodiment of the present invention. In the figure, 3 is an FET, 15 is a transistor, 9° 11 is a constant current source, 20, 21 and 23 are resistors, and 22 and 24 are capacitors.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 出力インピーダイスの大なる第1の増幅器の出力を第1
の時定数回路を介して出力インピーダンスの大なる第2
の増幅器に印加し、上記第2の増幅器の出入を第2の時
定数回路を介して出力端子に導出することを特徴とする
リアイコライザ回路。
The output of the first amplifier with large output impedance is
The second large output impedance through the time constant circuit of
A re-equalizer circuit characterized in that the voltage is applied to the amplifier, and the input and output signals of the second amplifier are derived to the output terminal via a second time constant circuit.
JP2924282U 1982-03-02 1982-03-02 rear equalizer circuit Pending JPS58132410U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2924282U JPS58132410U (en) 1982-03-02 1982-03-02 rear equalizer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2924282U JPS58132410U (en) 1982-03-02 1982-03-02 rear equalizer circuit

Publications (1)

Publication Number Publication Date
JPS58132410U true JPS58132410U (en) 1983-09-07

Family

ID=30041050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2924282U Pending JPS58132410U (en) 1982-03-02 1982-03-02 rear equalizer circuit

Country Status (1)

Country Link
JP (1) JPS58132410U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6326011A (en) * 1986-07-18 1988-02-03 Hitachi Ltd Amplifier circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5287959A (en) * 1976-01-19 1977-07-22 Toshiba Corp Cascode amplifier circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5287959A (en) * 1976-01-19 1977-07-22 Toshiba Corp Cascode amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6326011A (en) * 1986-07-18 1988-02-03 Hitachi Ltd Amplifier circuit

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