JPS60121331U - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPS60121331U
JPS60121331U JP823084U JP823084U JPS60121331U JP S60121331 U JPS60121331 U JP S60121331U JP 823084 U JP823084 U JP 823084U JP 823084 U JP823084 U JP 823084U JP S60121331 U JPS60121331 U JP S60121331U
Authority
JP
Japan
Prior art keywords
stage
oscillation circuit
resistor
stage inverter
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP823084U
Other languages
Japanese (ja)
Inventor
啓三 池田
功雄 一色
慎一郎 高橋
Original Assignee
住友電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 住友電気工業株式会社 filed Critical 住友電気工業株式会社
Priority to JP823084U priority Critical patent/JPS60121331U/en
Publication of JPS60121331U publication Critical patent/JPS60121331U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のシュミツドトリガート回路による発振回
路の構成図、第2図は本考案による発振回路の構成図、
第3図は第2図示す回路の主要部   −の波形のタイ
ムチャートである。 図面中、1’、2.3はインバータ、Ro、R2゜R3
は抵抗、Cは容量である。
Fig. 1 is a block diagram of an oscillation circuit using a conventional Schmidt-Trigart circuit, and Fig. 2 is a block diagram of an oscillation circuit according to the present invention.
FIG. 3 is a time chart of waveforms of the main parts of the circuit shown in FIG. In the drawing, 1', 2.3 are inverters, Ro, R2°R3
is resistance, and C is capacitance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 従続に接続された初段、2段目及び3段目からなる3個
のインバータと、3段目のインバータの出力と初段のイ
ンバータの入力との間に直列に接続された第3及び第1
の抵抗、R3,R,と、初段のインバータの入力と2段
目のインバータの出力とを接続する第2の抵抗R2と、
上記第3の抵抗R3と第1の抵抗R1の接続点と接地と
の間に接続された容量Cとからなることを特徴とする発
振回路。
Three inverters consisting of a first stage, a second stage and a third stage connected in series, and a third and first stage inverter connected in series between the output of the third stage inverter and the input of the first stage inverter.
a second resistor R2 connecting the input of the first stage inverter and the output of the second stage inverter,
An oscillation circuit comprising a capacitor C connected between a connection point between the third resistor R3 and the first resistor R1 and ground.
JP823084U 1984-01-26 1984-01-26 oscillation circuit Pending JPS60121331U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP823084U JPS60121331U (en) 1984-01-26 1984-01-26 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP823084U JPS60121331U (en) 1984-01-26 1984-01-26 oscillation circuit

Publications (1)

Publication Number Publication Date
JPS60121331U true JPS60121331U (en) 1985-08-16

Family

ID=30487323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP823084U Pending JPS60121331U (en) 1984-01-26 1984-01-26 oscillation circuit

Country Status (1)

Country Link
JP (1) JPS60121331U (en)

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