JPS60103969U - AFC day foot circuit - Google Patents

AFC day foot circuit

Info

Publication number
JPS60103969U
JPS60103969U JP19642283U JP19642283U JPS60103969U JP S60103969 U JPS60103969 U JP S60103969U JP 19642283 U JP19642283 U JP 19642283U JP 19642283 U JP19642283 U JP 19642283U JP S60103969 U JPS60103969 U JP S60103969U
Authority
JP
Japan
Prior art keywords
circuit
frequency divider
afc
output terminal
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19642283U
Other languages
Japanese (ja)
Other versions
JPH0119493Y2 (en
Inventor
今泉 教男
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP19642283U priority Critical patent/JPS60103969U/en
Publication of JPS60103969U publication Critical patent/JPS60103969U/en
Application granted granted Critical
Publication of JPH0119493Y2 publication Critical patent/JPH0119493Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Television Receiver Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のAFCディフィート回路の回路図、第
2図は同回路の説明波形図を示す。 主な図番の説明、2・・・同期分離回路、3・・・AF
C回路、4・・・ディフィート端子、5・・・基準発振
器、6・・・第1の分周器、7・・・水平偏向回路、9
・・・第2の分周器、11・・・垂直偏向回路、17・
・・第2のORゲート。
FIG. 1 shows a circuit diagram of the AFC defeat circuit of the present invention, and FIG. 2 shows an explanatory waveform diagram of the circuit. Explanation of main drawing numbers, 2...Synchronization separation circuit, 3...AF
C circuit, 4... Defeat terminal, 5... Reference oscillator, 6... First frequency divider, 7... Horizontal deflection circuit, 9
. . . second frequency divider, 11 . . . vertical deflection circuit, 17.
...Second OR gate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 映像信号が印加される同期分離回路に順次接続されたA
FC回路、基準発振器、第1の分周器及び水平偏向回路
と、前記第1の分周器の出力端が接続されると共1こ前
記同期分離回路の出力端がゲートを介して接続きれる第
2の分周器と、前記第2の分周器の出力側が接続される
垂直偏向回路より成る偏向回路において、前記同期分離
回路の出力端及び前記第2の分周器の出力端をORゲー
トに接続し、該ORゲートの出力端を前記へFC回路に
接続して、該ORゲートの出力をAFCディフィートパ
ルスとして前記へFC回路に印加することを特徴とした
AFCディフィート回路。
A sequentially connected to a synchronous separation circuit to which a video signal is applied.
The FC circuit, the reference oscillator, the first frequency divider, and the horizontal deflection circuit are connected to the output terminal of the first frequency divider, and the output terminal of the synchronous separation circuit is connected via a gate. In a deflection circuit including a second frequency divider and a vertical deflection circuit to which an output side of the second frequency divider is connected, an output terminal of the synchronous separation circuit and an output terminal of the second frequency divider are ORed. An AFC defeat circuit characterized in that the output end of the OR gate is connected to the FC circuit, and the output of the OR gate is applied as an AFC defeat pulse to the FC circuit.
JP19642283U 1983-12-20 1983-12-20 AFC day foot circuit Granted JPS60103969U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19642283U JPS60103969U (en) 1983-12-20 1983-12-20 AFC day foot circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19642283U JPS60103969U (en) 1983-12-20 1983-12-20 AFC day foot circuit

Publications (2)

Publication Number Publication Date
JPS60103969U true JPS60103969U (en) 1985-07-16
JPH0119493Y2 JPH0119493Y2 (en) 1989-06-06

Family

ID=30421422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19642283U Granted JPS60103969U (en) 1983-12-20 1983-12-20 AFC day foot circuit

Country Status (1)

Country Link
JP (1) JPS60103969U (en)

Also Published As

Publication number Publication date
JPH0119493Y2 (en) 1989-06-06

Similar Documents

Publication Publication Date Title
JPS60103969U (en) AFC day foot circuit
JPS6098971U (en) Synchronous detection circuit
JPS6082876U (en) Synchronous separation circuit
JPS6114578U (en) color synchronization circuit
JPS60177569U (en) Clock signal generation circuit for digital television receivers
JPS611978U (en) Timing signal generation circuit
JPS5883863U (en) Synchronous signal separation circuit
JPS5882069U (en) Television receiver synchronization separation circuit
JPS6050576U (en) Video tape recorder switching regulator circuit
JPS5914454U (en) Video signal processing device
JPS5849285U (en) timer clock circuit
JPS58173976U (en) magnetic recording and reproducing device
JPS5826266U (en) double scanning converter
JPS5866769U (en) Muting circuit
JPS6022072U (en) television signal delay device
JPS60129784U (en) Synchronous signal generation circuit
JPS61370U (en) Video signal recording system
JPS6040164U (en) Display clock generation circuit
JPS5967066U (en) Synchronous separation circuit
JPS59100336U (en) Clock pulse generation circuit for digital equipment
JPS58135167U (en) Vertical sync separation circuit
JPS59157362U (en) Synchronous signal separation circuit
JPS6123785U (en) Time axis correction device
JPS60149273U (en) Synchronous signal separation circuit
JPS6032861U (en) Synchronous detection circuit