JPS63118231U - - Google Patents

Info

Publication number
JPS63118231U
JPS63118231U JP840287U JP840287U JPS63118231U JP S63118231 U JPS63118231 U JP S63118231U JP 840287 U JP840287 U JP 840287U JP 840287 U JP840287 U JP 840287U JP S63118231 U JPS63118231 U JP S63118231U
Authority
JP
Japan
Prior art keywords
insulating film
etching
portion formed
stepped portion
protrusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP840287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP840287U priority Critical patent/JPS63118231U/ja
Publication of JPS63118231U publication Critical patent/JPS63118231U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す平面図、第2
図は第1図のA―A線断面図、第3図は本考案の
他の実施例を示す平面図、第4図は第3図のB―
B線断面図、第5図は従来例を示す平面図、第6
図は第5図のC―C線断面図である。 1……金属配線、2……絶縁膜段差部、3……
導電性残留物又は付着物、4……下地絶縁膜、5
……上地絶縁膜、6……絶縁膜突部。
Figure 1 is a plan view showing one embodiment of the present invention;
The figure is a sectional view taken along line A--A in FIG. 1, FIG. 3 is a plan view showing another embodiment of the present invention, and FIG.
A sectional view taken along line B, Fig. 5 is a plan view showing the conventional example, Fig. 6 is
The figure is a sectional view taken along the line CC in FIG. 1...Metal wiring, 2...Insulating film step portion, 3...
Conductive residue or deposit, 4... base insulating film, 5
... Upper insulating film, 6... Insulating film protrusion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁膜食刻による段差部を有する半導体素子に
おいて、絶縁膜食刻により形成される段差部に突
部を設けることを特徴とする半導体素子。
1. A semiconductor device having a stepped portion formed by etching an insulating film, wherein a protrusion is provided in the stepped portion formed by etching the insulating film.
JP840287U 1987-01-22 1987-01-22 Pending JPS63118231U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP840287U JPS63118231U (en) 1987-01-22 1987-01-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP840287U JPS63118231U (en) 1987-01-22 1987-01-22

Publications (1)

Publication Number Publication Date
JPS63118231U true JPS63118231U (en) 1988-07-30

Family

ID=30792744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP840287U Pending JPS63118231U (en) 1987-01-22 1987-01-22

Country Status (1)

Country Link
JP (1) JPS63118231U (en)

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