JPS63117431A - Mounting structure of electronic parts - Google Patents

Mounting structure of electronic parts

Info

Publication number
JPS63117431A
JPS63117431A JP61262686A JP26268686A JPS63117431A JP S63117431 A JPS63117431 A JP S63117431A JP 61262686 A JP61262686 A JP 61262686A JP 26268686 A JP26268686 A JP 26268686A JP S63117431 A JPS63117431 A JP S63117431A
Authority
JP
Japan
Prior art keywords
tab
ceramic substrate
buffer member
heat
thermal expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61262686A
Other languages
Japanese (ja)
Inventor
Michinori Shiina
椎名 道則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61262686A priority Critical patent/JPS63117431A/en
Publication of JPS63117431A publication Critical patent/JPS63117431A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Abstract

PURPOSE:To prevent a tab IC from being broken and to enable the high precision mounting of the tab IC on a ceramic substrate, by interposing a buffer member, which is small in a thermal expansion coefficient and high in elasticity, between the ceramic substrate and the tab IC. CONSTITUTION:A buffer member 12 interposed between a ceramic substrate 2 and a tab IC 4 is composed of the following parts: a recessed member 12a made of an elastic thin plate with an opening part on its upside, and a pair of elastic leg members 12b whose base parts are stuck on the lower part of the member 12a and whose free ends are placed nearly horizontally, and besides the buffer member 12 is made of a material small in a thermal expansion coefficient and high in elasticity. Even if a cap 7 is distorted by heat or even if outer force acting on the tab IC 4 is applied from the upside of the cap 7, the buffer member 12 is displaced to absorb the stress due to this outer force and to prevent the tab IC 4 from being broken. Besides, even if heat is applied to the buffer member 12 when the tab IC 4 is mounted on the ceramic substrate 2 through the buffer member 12, the buffer member 12 is slightly displaced by heat, so that the tab IC 4 is not slided and it is mounted with high precision on the ceramic substrate 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、テープキャリア方式で組立てられたタブ付集
積回路とセラミック基板とで構成される電子部品の構造
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of an electronic component composed of a tabbed integrated circuit assembled using a tape carrier method and a ceramic substrate.

〔従来の技術〕[Conventional technology]

従来、この種の電子部品の実装構造としては、例えば第
2図に示すようなものがある。第2図に示す電子部品1
は、セラミック基板2の上にブロック状の緩衝用有機絶
縁体3が設置されていて、その上にタブ付集積回路(以
下タブICという)4が実装されている。タブIC4の
タブ5とセラミック基板2は、タブICリード6で接続
されている。セラミック基板2上の上記の各部品は、セ
ラミック基板2に固着されたキャップ7によりカバーさ
れている。
Conventionally, there is a mounting structure for this type of electronic component as shown in FIG. 2, for example. Electronic component 1 shown in Figure 2
A block-shaped buffering organic insulator 3 is placed on a ceramic substrate 2, and a tab integrated circuit (hereinafter referred to as tab IC) 4 is mounted thereon. The tab 5 of the tab IC 4 and the ceramic substrate 2 are connected by a tab IC lead 6. Each of the above components on the ceramic substrate 2 is covered by a cap 7 fixed to the ceramic substrate 2.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の電子部品の組立て構造では、緩衝用有機
絶縁体3がブロック体であるので、タブIC4をセラミ
ック基板2に装着するときに加えられる熱のために緩衝
用有機絶縁体3が熱瞼脹を起こし、タブIC4を変位さ
せてしまう。この緩衝用有機絶縁体3の変位によりタブ
IC4を精度よくセラミック基板2に装着できないとい
う欠点があった。また、緩衝用有機絶縁体3の熱膨脹を
抑えるために、有機絶縁体以外の金属物を使用すると、
緩衝用有機絶縁体3を構成しているブロック体に弾性が
ないので、電子部品の発熱等によって生じる構成部品間
の歪を充分吸収することができず、これらの歪による大
きな応力がタブIC4に作用して、タブIC4を破損さ
せてしまうという欠点があった。
In the above-described conventional electronic component assembly structure, the buffer organic insulator 3 is a block body, so the buffer organic insulator 3 is heated due to the heat applied when the tab IC 4 is attached to the ceramic substrate 2. This causes swelling and displaces the tab IC4. Due to this displacement of the buffering organic insulator 3, there was a drawback that the tab IC 4 could not be accurately mounted on the ceramic substrate 2. In addition, if a metal material other than the organic insulator is used to suppress the thermal expansion of the buffer organic insulator 3,
Since the block body constituting the buffering organic insulator 3 has no elasticity, it cannot sufficiently absorb the strain between the components caused by heat generation of electronic components, etc., and the large stress due to this strain is applied to the tab IC 4. This has the disadvantage that the tab IC 4 may be damaged.

本発明は、このような欠点を解消した電子部品の実装構
造の提供を目的としている。
The present invention aims to provide a mounting structure for electronic components that eliminates such drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の電子部品の実装構造は、緩衝用部材を、熱膨脹
率の小さく、かつ弾性の高い薄板で構成し、この緩衝部
材品をセラミック基板とタブICとの間に設置したこと
を特徴としている。
The electronic component mounting structure of the present invention is characterized in that the buffer member is composed of a thin plate with a low coefficient of thermal expansion and high elasticity, and the buffer member is installed between the ceramic substrate and the tab IC. .

従って、熱膨脹率が小さく、弾性の高い緩衝部材により
、セラミック基板とタブICとの間の緩衝力が向上して
、タブICを損傷させることなく、かつ熱膨脹によりタ
ブICを変位させることなく、タブICを精度よくセラ
ミック基板に装着することが可能となる。
Therefore, the buffering member with a low coefficient of thermal expansion and high elasticity improves the buffering force between the ceramic substrate and the tab IC, so that the tab It becomes possible to mount an IC on a ceramic substrate with high precision.

〔実施例〕〔Example〕

以下本発明の一実施例を、図面に基づいて説明する。 An embodiment of the present invention will be described below based on the drawings.

なお、第2図に示すものと同一の機能のものは同じ符号
で表わしてその説明は省略する。
Components having the same functions as those shown in FIG. 2 are designated by the same reference numerals, and their explanation will be omitted.

第1図は、本発明の電子部品の実装構造の一実施例を示
す縦断正面図である。
FIG. 1 is a longitudinal sectional front view showing an embodiment of the electronic component mounting structure of the present invention.

本発明の実装構造による電子部品11は、セラミック基
板2とタブIC4との間に緩衝部材12が配置されてい
る。この緩衝部材12は、上方に開口していて弾性を有
する薄板からなる凹状部材12aと、その下部に基部を
それぞれ固着されていて、自由端がほぼ水平状をなす弾
性を有する1対の脚部材12bとから形成されている。
In the electronic component 11 according to the mounting structure of the present invention, a buffer member 12 is disposed between the ceramic substrate 2 and the tab IC 4. This buffer member 12 includes a concave member 12a made of an elastic thin plate that is open upward, and a pair of elastic leg members whose bases are fixed to the lower part of the concave member 12a and whose free ends are substantially horizontal. 12b.

状緩衝部材12には、熱膨脹率が小さく、かつ弾性の高
い材質が用いられている。
The shaped buffer member 12 is made of a material with a low coefficient of thermal expansion and high elasticity.

上記のように構成された電子部品11において、キャッ
プ7が、熱によって歪むか、あるいはキャップ7の上か
ら外力が加わる等により、タブIC4に外力が作用して
も、緩衝部材12がこれらの外力による応力を変位によ
り吸収して、タブIC4の損傷をさけることができる。
In the electronic component 11 configured as described above, even if an external force acts on the tab IC 4 due to the cap 7 being distorted due to heat or an external force being applied from above the cap 7, the buffer member 12 is able to absorb the external force. Damage to the tab IC 4 can be avoided by absorbing the stress due to the displacement.

また、タブIC4を、緩衝部材12を介してセラミック
基板2に装着する際に熱を加えても、緩衝部材12は熱
による変位が小さいので、タブI C’4がこれにより
ずれるということがなく、タブIC4を精度よくセラミ
ック基板2に装着することができる。
Furthermore, even if heat is applied when attaching the tab IC4 to the ceramic substrate 2 via the buffer member 12, the buffer member 12 is only slightly displaced by the heat, so the tab IC'4 will not shift due to this. , the tab IC 4 can be mounted on the ceramic substrate 2 with high precision.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、セラミック基板と
、タブICとの間に熱膨脹率が小さく、かつ弾性の高い
緩衝部材を設置することにより、電子部品に作用する熱
または外力によりタブICに発生する応力を緩衝部材に
より吸収してタブICの破損を防止するとともに、タブ
ICをセラミック基板に装着する際に熱が加えられても
、緩衝部材の変位が小さいのでタブICがずれることが
な(、精度よくタブICをセラミック基板に装着するこ
とができる。
As explained above, according to the present invention, by installing a buffer member having a small coefficient of thermal expansion and high elasticity between a ceramic substrate and a tab IC, heat or external force acting on the electronic component can be applied to the tab IC. The generated stress is absorbed by the buffer member to prevent damage to the tab IC, and even if heat is applied when attaching the tab IC to the ceramic substrate, the displacement of the buffer member is small, so the tab IC will not shift. (The tab IC can be mounted on the ceramic substrate with high precision.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す電子部品の実装構造の
縦断正面図、第2図は従来の電子部品の実装構造の一例
を示す縦断正面図である。 2・・・・・・セラミック基板、 4・・・・・・タブ付集積回路、 5・・・・・・タブ、6・・・・・・タブICリード、
7・・・・・・キャップ、11・・・・・・電子部品、
12・・・・・・緩挿1部材。 出  願  人 日本電気株式会社 代  理  人
FIG. 1 is a longitudinal sectional front view of an electronic component mounting structure showing an embodiment of the present invention, and FIG. 2 is a longitudinal sectional front view showing an example of a conventional electronic component mounting structure. 2... Ceramic substrate, 4... Integrated circuit with tab, 5... Tab, 6... Tab IC lead,
7...Cap, 11...Electronic parts,
12...1 member for loose insertion. Applicant: NEC Corporation Representative

Claims (1)

【特許請求の範囲】[Claims] 配線パターンを有するセラミック基板と、前記配線パタ
ーンに接続可能の複数のタブを有するタブ付集積回路と
、このタブ付集積回路を前記セラミック基板に接合固定
するための緩衝部材と、前記セラミック基板上に搭載さ
れた部品をカバーするキャップとからなる電子部品組み
立て構造において、前記緩衝部材を、熱膨脹の小さい材
料であって弾性を有する薄板で形成し、この緩衝用有機
絶縁体を、前記セラミック基板とタブ付集積回路との間
に設置したことを特徴とする電子部品の実装構造。
a ceramic substrate having a wiring pattern; a tabbed integrated circuit having a plurality of tabs connectable to the wiring pattern; a buffer member for bonding and fixing the tabbed integrated circuit to the ceramic substrate; In an electronic component assembly structure consisting of a cap that covers mounted components, the buffer member is formed of a thin elastic plate made of a material with low thermal expansion, and the buffer organic insulator is attached to the ceramic substrate and the tab. An electronic component mounting structure characterized by being installed between an attached integrated circuit.
JP61262686A 1986-11-06 1986-11-06 Mounting structure of electronic parts Pending JPS63117431A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61262686A JPS63117431A (en) 1986-11-06 1986-11-06 Mounting structure of electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61262686A JPS63117431A (en) 1986-11-06 1986-11-06 Mounting structure of electronic parts

Publications (1)

Publication Number Publication Date
JPS63117431A true JPS63117431A (en) 1988-05-21

Family

ID=17379183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61262686A Pending JPS63117431A (en) 1986-11-06 1986-11-06 Mounting structure of electronic parts

Country Status (1)

Country Link
JP (1) JPS63117431A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03136258A (en) * 1988-11-21 1991-06-11 Honeywell Inc Semiconductor chip package and its manufacture
US5548487A (en) * 1991-09-27 1996-08-20 Siemens Nixdorf Informationssysteme Aktiengesellchaft Flat circuit module mounting using an elastic pad in a depression of a circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03136258A (en) * 1988-11-21 1991-06-11 Honeywell Inc Semiconductor chip package and its manufacture
US5548487A (en) * 1991-09-27 1996-08-20 Siemens Nixdorf Informationssysteme Aktiengesellchaft Flat circuit module mounting using an elastic pad in a depression of a circuit board

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