JPS63104163A - Bus sharing system - Google Patents

Abstract

PURPOSE:To turn on the bus using request signal of a circuit block having high priority by using a wired OR where the priority is decided previously with the bus using request signal of each circuit block having longer ON time set with higher priority defined as an input and the bus busy display signal defined as an output respectively and checking the bus busy display signal through an OFF state secured for a fixed time after the ON state of a prescribed period. CONSTITUTION:The higher priorities are successively set to circuit blocks 1-4 in case of the conflict mode of bus using requests. The On times of bus using request signals 6-9 are set longer as T1<T2<T3<T4 with the circuit blocks of higher priorities. The circuit blocks 1 and 3 confirms OFf of a bus busy display signal 10 and turns on signals 6 and 8. The signal 8 has a longer ON time than the signal 6 and therefore an ON state is maintained for circuit blocks even though the signal 10 is checked after the signal 6 is turned off. The circuit 3 is turned on again and uses a bus 5 since the signal 10 is turned off and it is known that no bus request is received from the circuit blocks of higher priorities.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bus sharing system in which a plurality of circuit blocks share a bus, and particularly to a control system for bus usage rights.

[Conventional technology]

Conventionally, in this type of bus sharing system, as a method of acquiring bus usage rights, each bus usage request source is provided with a bus usage request signal and an acknowledge signal for the bus usage request signal.
The bus control unit controls the right to use the bus by managing a plurality of request signals and returning an acknowledge signal.

[Problem that the invention seeks to solve]

In the conventional bus sharing system described above, as many pairs of bus request signals and acknowledge signals as there are bus request sources are required, so as the number of bus request sources increases, the number of signal lines increases and the number of bus request signals increases. In a packaged system, the priority of bus usage requests is usually uniquely determined by the mounting slot for each request source.

(Means for Solving the Problems) In the bus sharing system of the present invention, priority is determined in advance when bus use requests of each circuit block compete, and each circuit block inputs a bus use indication signal and ,
When a bus use request is made, the bus use request signal is turned on for a certain period of time and outputted. A wired OR is provided that inputs the bus use request signal and outputs the bus use indication signal.When requesting bus use, each circuit block outputs the bus use request signal after confirming that the bus use indication signal is off. The bus is turned on for a certain period of time, and then turned off for a certain period of time to check the bus in-use display signal. If it is off, it is determined that there is no request to use the bus from another circuit with a higher priority than its own circuit block, and the bus is turned off again. If the use request signal is turned on to use the bus, and the bus-in-use display signal is turned on, it is determined that a circuit block with a higher priority than its own circuit block is requesting the use of the bus, and the bus is not used. have the means not to do so.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the bus sharing system of the present invention, and FIGS. 2 and 3 are time charts showing the procedure up to the use of the bus 5 in this embodiment.

This embodiment is composed of four circuits 1.2, 3.4 and a bus 5. When bus usage requests of circuit blocks 1 to 4 compete, the priority order is set in the order of circuit blocks 1, 2, 3, 4, and 4. Each of the circuit blocks 1 to 4 inputs the bus use indication signal 10, and also sends the bus use request signals 6.7, 8.9 for a certain period of time T1 to T2, respectively, when requesting the use of the bus. T3. It is designed to output as T4 on. The on-times of the bus use request signals 6, 7, 8.9 are T+, T2 . T3. T4 is T, 〈TjkuT4
In other words, the circuit blocks with higher priority are set to be longer.

Further, an oven collector is provided at the output of each circuit block 1 to 4 to form a wired OR configuration, and the bus use indication signal 10 is obtained by the logical sum of the bus use request signals 6 to 9.

Next, the operation of this embodiment will be explained with reference to FIGS. 2 and 3.

(1) When only circuit block 1 issues a bus use request (Figure 2) Circuit block 0 first confirms that the bus use indication signal 100 is OFF, and then transmits the bus use request signal 6 to the time TI.
Turn on. Thereafter, while the bus use request signal 6 is turned off for a time T0, the bus use indication signal 10 is checked. In this case, since the bus in-use display signal 10 is off, it is determined that there is no bus use request from another circuit block with a higher priority than itself, and the bus 5 is used while the bus use request signal 6 is turned on again. During this time, the other circuit blocks 2 to 4 cannot use the bus 51Fr because the bus in use display signal 10 is on.

(2) When the bus use requests of circuit blocks 1 and 3 conflict (Figure 3) 0 circuit blocks 1 and 3 turn on the bus use request signals 6 and 8, respectively, after confirming that the bus use indication signal 10 is off. shall be. At this time, the on time T3 of the bus use request signal 8 of the circuit block 3 is longer than the on time of the bus use request signal 6 of the circuit block 3. therefore,
Since circuit block 1 remains on even if the bus use request signal 6 is turned off and the bus use indication signal 10 is checked, it can be seen that other blocks 2 to 4 with higher priority are making bus use requests. Bus 5 will not be used.
On the other hand, when the circuit block 3 turns off the bus use request signal 8, the bus use indication signal 10 turns off, indicating that there is no bus request from another block with a higher priority than the circuit block 3, and the bus use request signal 8 turns off. Use bus 5 while turning on again.

〔Effect of the invention〕

As explained above, the present invention realizes bus usage right control using only the output signal of each circuit block (bus usage request signal) and the input signal common to the circuit blocks (bus usage indication signal). Not only is there no restriction on the implementation location, but the priority of bus requests is also smoothed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the bus sharing system of the present invention, and FIGS. 2 and 3 are time charts showing the procedure up to the use of the bus 5 in this embodiment. 1.2, 3.4...Circuit block, 5...
... Bus, 6.7, 8.9 ... Bus use request signal, 10 ... Bus use display signal. Figure 1

Claims (1)

[Claims] In a bus sharing system in which a plurality of circuit blocks share a bus, priority is determined in advance when bus use requests of each circuit block compete, and each circuit block receives a bus use indication signal. In addition, when a bus use request is made, the bus use request signal is output as being on for a certain period of time, and the on time of the bus use request signal is different for each circuit block, and is set longer for a circuit block with a higher priority. A wired OR is provided that inputs the bus use request signal of each circuit block and outputs the bus use indication signal.When each circuit block requests bus use, after confirming that the bus use indication signal is off, it requests bus use. The signal is turned on for a predetermined period of time, then turned off for a certain period of time, and the bus in-use display signal is checked. If it is turned off, it is determined that there is no request to use the bus from another circuit with a higher priority than the own circuit block, and the circuit is turned off again. If the bus is used by turning on the bus use request signal, and the bus in use display signal is on, it is determined that a circuit block with a higher priority than its own circuit block is making a bus use request, and the bus is used. A bus sharing system characterized by having means for not performing.